Coupled Asymmetric Quantum Confinement Structures

An integrated circuit, comprising:

• a first logic module;
• a second logic module;
• and
• a coupled asymmetric quantum confinement structure communicatively coupling the first logic module to the second logic module, wherein the coupled asymmetric quantum confinement structure comprises:
• a first quantum confinement structure and a second quantum confinement structure, wherein each quantum confinement structure comprises a first cladding layer, an inner layer formed on the first cladding layer, a second cladding layer formed on the inner layer, an n+ region and a p+ region formed in the first cladding layer, and a first gate electrode formed on the second cladding layer, the n+ and the p+ regions to inject charge carriers into the inner layer and the first gate electrode being configured to deliver a first gate voltage,
• wherein the second quantum confinement structure is coupled in series with the first quantum confinement structure, wherein the second quantum confinement structure comprises at least one asymmetric physical dimension as compared to the first quantum confinement structure, and
• wherein the coupled first and second quantum confinement structures are capable of influencing a delay and/or frequency of an optical signal.

A method for producing a coupled asymmetric quantum confinement structure, the method comprising:

• providing a substrate;
• depositing a first cladding layer on the substrate;
• depositing an inner layer on the first cladding layer, a first portion of the inner layer being associated with a first quantum confinement structure and a second portion of the inner layer being associated with a second quantum confinement structure, the second portion comprising at least one asymmetric physical dimension as compared to the first quantum confinement structure, and the first and second quantum confinement structures being capable of influencing a delay and/or frequency of an optical signal;
• depositing a second cladding layer on the inner layer
• forming an n+ region and a p+ region in the first region of the first cladding layer, the n+ region and the p+ region in the first region of the first cladding layer to inject charge carriers into the inner layer;
• forming a first gate electrode that is configured to deliver a gate voltage to the first quantum confinement structure.

An integrated circuit, comprising:

• a first logic module;
• a second logic module;
• and
• a coupled asymmetric quantum confinement structure communicatively coupling the first logic module to the second logic module, wherein the coupled asymmetric quantum confinement structure comprises:
• a first quantum confinement structure comprising a first cladding layer, an inner layer formed on the first cladding layer, a second cladding layer formed on the inner layer, an n+ region and a p+ region formed in the first cladding layer, and a first gate electrode formed on the second cladding layer, the n+ and the p+ regions to inject charge carriers into the inner layer and the first gate electrode being configured to deliver a first gate voltage,
• a second quantum confinement structure coupled in series with the first quantum confinement structure, wherein the second quantum confinement structure comprises a first cladding layer, an inner layer formed on the first cladding layer, a second cladding layer formed on the inner layer, an n+ region and a p+ region formed in the first cladding layer, and a second gate electrode formed on the second cladding layer, the n+ and the p+ regions to inject charge carriers into the inner layer and the second gate being configured to deliver a second gate voltage, the second quantum confinement structure comprising at least one asymmetric physical dimension as compared to the first quantum confinement structure, and
• wherein the coupled first and second quantum confinement structures are capable of modifying a delay and/or frequency of an optical signal.