Method for proximity correction
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJaw-Jung Shin, Shy-Jay Lin, Hua-Tai Lin, Burn Jeng Lin
Life of this patent
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Abstract
A method of an integrated circuit (IC) design includes receiving an IC design layout. The IC design layout includes an IC feature with a first outer boundary and a first target points assigned to the first outer boundary. The method also includes generating a second outer boundary for the IC feature and moving all the first target points to the second outer boundary to form a modified IC design layout.
Claims21
A method for making a mask for an integrated circuit (IC) design, the method comprising:
- receiving an IC design layout, the IC design layout including:
- an IC feature with a first outer boundary, and
- first target points assigned to the first outer boundary;
- generating, using a computing system, a second outer boundary for the IC feature;
- moving all the first target points to the second outer boundary to form a modified IC design layout;
- and
- providing the modified IC design layout for fabrication of the mask.
A method for making a mask for an integrated circuit (IC) design layout, the method comprising:
- receiving the IC design layout having an IC feature with a first outer boundary;
- assigning first target points to the first outer boundary;
- applying, using a computer, a convolution on the IC design layout with a predetermined function to generate a second outer boundary of the IC feature;
- moving the first target points to the second outer boundary to form a modified IC design layout;
- performing a proximity correction on the modified IC design layout;
- and
- performing a photolithography simulation on the modified IC design layout.
19-20. (canceled)
A method comprising:
- receiving a design layout having a feature, wherein the feature has a first boundary;
- assigning a target point to the first boundary;
- using a computing system, performing a photolithographic simulation on the design layout to determine a second boundary for the feature, wherein the photolithographic simulation includes performing a mathematical convolution of the design layout with an equation modeling a photolithographic blur of a photolithographic exposure system;
- relocating the target point based on the second boundary of the feature;
- and
- providing the design layout having the relocated target point for performing a proximity correction thereupon.
Dependencies are inferred from the claim text.