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US 2014/0006905 A1Published application
Systems and Methods for Multi-Stage Decoding Processing
AssigneeLSI Corporation
InventorFan Zhang
Life of this patent
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Abstract
The present invention is related to systems and methods for serial application of different decode algorithms to a processing data set.
Claims25
A data processing system, the data processing system comprising:
- a data detector circuit operable to apply a data detection algorithm to a data input to yield a first detected output, and to apply the data detection algorithm to the data input guided by a first decoded output to yield a second detected output;
- and
- a data decoder circuit operable to:
- apply a first data decoding algorithm to the first detected output to yield the first decoded output;
- and
- apply a second data decoding algorithm to the second detected output to yield a second decoded output.
3 more elements
A method, the method comprising:
- applying a data detection algorithm to a data input to yield a first detected output;
- applying a first data decoding algorithm to the first detected output to yield a first decoded output;
- re-applying the data detection algorithm to the data input guided by the first decoded output to yield a second detected output;
- determining that a number of applications of the data detection algorithm to the data input is greater than a threshold;
- based at least in part on the determination that the number of applications of the data detection algorithm to the data input is greater than the threshold, applying a second data decoding algorithm to the second detected output to yield a second decoded output.
2 more elements
A storage device, the storage device comprising:
- a storage medium;
- a head assembly disposed in relation to the storage medium and operable to provide a sensed signal corresponding to information on the storage medium;
- a read channel circuit including:
- an analog front end circuit operable to provide an analog signal corresponding to the sensed signal;
- an analog to digital converter circuit operable to sample the analog signal to yield a series of digital samples;
- an equalizer circuit operable to equalize the digital samples to yield a sample set;
- a data detector circuit operable to apply a data detection algorithm to the sample set to yield a first detected output, and to apply the data detection algorithm to the sample set guided by a first decoded output to yield a second detected output;
- and
- a data decoder circuit operable to:
- apply a first data decoding algorithm to the first detected output to yield the first decoded output;
- and
- apply a second data decoding algorithm to the second detected output to yield a second decoded output.
9 more elements
Dependencies are inferred from the claim text.