Mechanism for achieving high memory reliablity, availability and serviceability
AssigneeIntel Corporation
InventorsDEBALEENA DAS, KAI CHENG, JONATHAN C. JASPER
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Abstract
A mechanism is described for achieving high memory reliability, availability, and serviceability (RAS) according to one embodiment of the invention. A method of embodiments of the invention includes detecting a permanent failure of a first memory device of a plurality of memory devices of a first channel of a memory system at a computing system, and eliminating the first failure by merging a first error-correction code (ECC) locator device of the first channel with a second ECC locator device of a second channel, wherein merging is performed at the second channel.
Claims21
A method comprising:
- detecting a permanent failure of a first memory device of a plurality of memory devices of a first channel of a memory system at a computing system;
- and
- eliminating the first failure by merging a first error-correction code (ECC) locator device of the first channel with a second ECC locator device of a second channel, wherein merging is performed at the second channel.
A memory controller comprising:
- an error-correction code (ECC) merging mechanism having
- first logic to detect a permanent failure of a first memory device of a plurality of memory devices of a first channel of a memory system at a computing system;
- and
- second logic to eliminate the first failure by merging a first error-correction code (ECC) locator device of the first channel with a second ECC locator device of a second channel, wherein merging is performed at the second channel.
A system comprising:
- one or more memory devices;
- and
- an error-correction code (ECC) merging mechanism to
- detect a permanent failure of a first memory device of a plurality of memory devices of a first channel of a memory system at a computing system, and
- eliminate the first failure by merging a first error-correction code (ECC) locator device of the first channel with a second ECC locator device of a second channel, wherein merging is performed at the second channel.
Dependencies are inferred from the claim text.