On-Chip Probe Circuit for Detecting Faults in an FPGA

In an integrated circuit including programmable logic circuitry including a plurality of flip flops arranged in a plurality of rows and columns, each flip flop having an asynchronous data input line, an asynchronous load line, and a data output, a read-write probe circuit for the flip flops comprising:

• a probe data line;
• a probe-data/column-select line;
• a first address circuit coupled to first address lines for choosing a selected flip flop from a first group of the plurality of flip flops;
• a first read-probe enable line for selectively coupling the data output of the selected flip flop from the first group to the probe-data line;
• a second address circuit coupled to second address lines for choosing a selected flip flop from a second group of the plurality of flip flops;
• a second read-probe enable line for selectively coupling the data output of the selected flip flop from the second group to the probe-data/column-select line;
• a data input path to the asynchronous data input line of each flip flop;
• a write-probe data input path from the probe data line to the asynchronous data input line of each flip flop;
• a write-probe enable line;
• first selection circuitry coupled to the probe-data/column-select line, the write-probe enable line and the first address circuit, to selectively couple one of the data input path and the write-probe data input path to the asynchronous data input of the selected flip flop from the first group;
• and
• second selection circuitry coupled to the probe-data/column-select line, the write-probe enable line and the second address circuit, to selectively couple one of the data input path and the write-probe data input path to the asynchronous data input of the selected flip flop from the second group.

A method for probing a sequential logic device in a programmable logic device, comprising:

• directly addressing a sequential logic device in the programmable logic device;
• providing test input data directly to a data input of the sequential logic device;
• enabling a write input to the sequential logic device;
• and
• providing a write command to the sequential logic device to load the test input data into the sequential logic device.

A method for probing flip-flops in a programmable logic device, comprising:

• directly addressing a plurality of flip flops in the programmable logic device;
• providing test input data directly to a data input of each of the plurality of flip flops;
• enabling a write input to each of the plurality of flip flops;
• providing a write command to each of the plurality of flip flops to load the test input data into each of the plurality of flip flops;
• reading output data at outputs of each of the plurality of flip flops;
• and
• comparing the test input data and output data of each of the plurality of flip flops.