Semiconductor memory controlling device
AssigneeKabushiki Kaisha Toshiba
InventorsTetsuro Kimura, Shigehiro Asano
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AssigneeKabushiki Kaisha Toshiba
InventorsTetsuro Kimura, Shigehiro Asano
Estimating the term…
According to one embodiment, a semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.
1-6. (canceled)
A semiconductor memory controlling device to which a plurality of semiconductor memory drives are connected and that writes data requested to be written with a logical address specified by an information processing apparatus, the data including one or more pieces of first data, the first data having a predetermined size,
A method for controlling a semiconductor memory controlling device to which a plurality of semiconductor memory drives are connected, the semiconductor memory controlling device writing data requested to be written with a logical address specified by an information processing apparatus, the data including one or more pieces of first data, the first data having a predetermined size,
Dependencies are inferred from the claim text.