Method and a device for controlling a clock signal generator

A network element comprising:

• at least one ingress port for connecting to a data transfer network,
• a controllable clock signal generator for generating a first clock signal, and
• a control device for controlling the clock signal generator,
• wherein the control device comprises a processing system configured to:
• form a control quantity at least partly on the basis of stored reception moments of data frames belonging to a first flow that is a part of an aggregate flow, the reception moments being time values based on a first clock signal and the data frames belonging to the first flow being transmitted in accordance with a second clock signal,
• control the clock signal generator with the control quantity so as to achieve synchronization between the first clock signal and the second clock signal,
• check whether pre-determined bits of a received data frame of the aggregate flow constitute a first bit pattern, the first bit pattern occurring when the received data frame belongs to the first flow, and
• in response to a situation in which the first bit pattern occurs, store the reception moment of the received data frame so that the stored reception moment is associated with the first flow.

A method for controlling a clock signal generator, the method comprising:

• forming a control quantity at least partly on the basis of stored reception moments of data frames belonging to a first flow that is a part of an aggregate flow, the reception moments being time values based on a first clock signal and the data frames belonging to a first flow being transmitted in accordance with a second clock signal,
• controlling the clock signal generator with the control quantity so as to achieve synchronization between the first clock signal and the second clock signal,
• checking whether pre-determined bits of a received data frame of the aggregate flow constitute a first bit pattern, the first bit pattern occurring when the received data frame belongs to the first flow, and
• in response to a situation in which the first bit pattern occurs, storing the reception moment of the received data frame so that the stored reception moment is associated with the first flow.

A non-transitory computer readable medium encoded with a computer program for controlling a clock signal generator, the computer program comprising computer executable instructions for controlling a programmable processor to:

• form a control quantity at least partly on the basis of stored reception moments of data frames belonging to a first flow that is a part of an aggregate flow, the reception moments being expressed as time values based on a first clock signal and the data frames belonging to a first flow being transmitted in accordance with a second clock signal, and
• control the clock signal generator with the control quantity so as to achieve synchronization between the first clock signal and the second clock signal,
• check whether pre-determined bits of a received data frame of the aggregate flow constitute a first bit pattern, the first bit pattern occurring when the received data frame belongs to the first flow, and
• in response to a situation in which the first bit pattern occurs, store the reception moment of the received data frame so that the stored reception moment is associated with the first flow.