Mechanism for facilitating dynamic multi-mode memory packages in memory systems
AssigneeIntel Corporation
InventorsChristopher E. Cox, Christopher P. Mozak, Rebecca Z. Loop
Life of this patent
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Abstract
A mechanism is described for facilitating dynamic multi-mode memory packages in memory systems according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a plurality of memory modes on a single memory package at a motherboard of a computing system. The plurality of memory modes is associated with a plurality of physical organizations of memory devices. The method may further include receiving a request to switch from a first memory mode to a second memory mode of the plurality of memory mode, and dynamically switching from the first memory mode to the second memory mode, in response to the request.
Claims27
A method comprising:
- maintaining a plurality of memory modes on a single memory package at a motherboard of a computing system, wherein the plurality of memory modes are associated with a plurality of physical organizations of memory devices;
- receiving a request to switch from a first memory mode to a second memory mode of the plurality of memory modes, wherein the first memory mode comprises an interleaved mode and the second memory mode comprises a non-interleaved mode;
- and
- dynamically switching from the first memory mode to the second memory mode, in response to the request, wherein dynamic switching includes seamlessly routing data from a first output buffer associated with the first memory mode to a second output buffer associated with the second memory mode.
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A memory controller comprising:
- a multi-mode control mechanism having
- first logic to maintain a plurality of memory modes on a single memory package at a motherboard of a computing system, wherein the plurality of memory modes are associated with a plurality of physical organizations of memory devices;
- second logic to receive a request to switch from a first memory mode to a second memory mode of the plurality of memory modes, wherein the first memory mode comprises an interleaved mode and the second memory mode comprises a non-interleaved mode;
- and
- third logic to dynamically switch from the first memory mode to the second memory mode, in response to the request, wherein dynamic switching includes seamlessly routing data from a first output buffer associated with the first memory mode to a second output buffer associated with the second memory mode.
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A system comprising:
- a plurality of memory devices at a computing system;
- a plurality of physical organizations associated with the plurality of memory devices;
- and
- a multi-mode control mechanism to
- maintain a plurality of memory modes on a single memory package of a computing system, wherein the plurality of memory modes are associated with the plurality of physical organizations;
- receive a request to switch from a first memory mode to a second memory mode of the plurality of memory modes, wherein the first memory mode comprises an interleaved mode and the second memory mode comprises a non-interleaved mode;
- and
- dynamically switching from the first memory mode to the second memory mode, in response to the request, wherein dynamic switching includes seamlessly routing data from a first output buffer associated with the first memory mode to a second output buffer associated with the second memory mode.
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Dependencies are inferred from the claim text.