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US 2014/0006730 A1Published application
Memory controller devices, systems and methods for high reliability memory devices
AssigneeCypress Semiconductor Corporation
InventorsSuhail Zain, Helmut Puchner, Walt Anderson, Karthik Navalpakam
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Abstract
A device can include a controller interface having at least one controller data output configured to output read data, and at least one controller data input configured to receive write data; and a memory device interface having a write data output configured to transmit the write data on rising and falling edges of a periodic signal, and a read data input configured to receive the read data at a same transmission rate as the write data.
Claims20
A device, comprising:
- a controller interface having
- at least one controller data output configured to output read data, and
- at least one controller data input configured to receive write data, and
- a control circuit configured to translate memory device requests from a first format to at least a second format;
- and
- a memory device interface having
- a write data output configured to transmit the write data on rising and falling edges of a periodic signal, and
- a read data input configured to receive the read data at a same transmission rate as the write data.
5 more elements
A device, comprising:
- an interface circuit configured to translate memory access requests at a controller interface into signals at a memory device interface different from the controller interface;
- wherein
- the memory device interface comprises
- an address output configured to transmit address values,
- a write data output configured to transmit write data on rising and falling edges of a periodic signal, and
- a read data output configured to transmit read data at the same rate as the write data.
3 more elements
A method, comprising:
- providing an interface circuit to translate memory requests in a first format, issued from a controller device, to memory requests of a second format that access at least one memory device;
- wherein
- the first format is different than the second format, and
- the second format includes
- transmitting addresses to the at least one memory device,
- transmitting write data on a write data output on rising and falling edges of a periodic signal, and
- receiving read data at a read data input at the same rate as the write data, the read data input being different from the write data output.
4 more elements
Dependencies are inferred from the claim text.