Setting A Number (N) Of Fast Training Sequences (FTS) Automatically To An Optimal Value
AssigneeIntel Corporation
InventorAlon Meir
Life of this patent
Estimating the term…
Abstract
Embodiments of the present disclosure provide a PCIe interface module and a physical layer to negotiate a link by exchanging a number of fast training sequences (N_FTS). The physical layer may count the number of good FTSs exchanged during an initial or a subsequent link training. The number of FTSs to be exchanged during a subsequent link training may be a number in which a maximum initial number of fast training sequences to be exchanged is reduced by the number of good FTSs exchanged during the initial link training, reducing link training time and increasing efficiency.
Claims21
An apparatus comprising:
- a Peripheral Component Interconnect Express (PCIe) interface module to interface the processor to another PCIe component, the PCIe interface module comprising:
- a transaction layer;
- a data layer, the transaction layer and data layer to form packets that carry data between the processor and the other PCIe component;
- a physical layer, the physical layer to negotiate a link between the processor and the PCIe component by exchanging a number (N) of Fast Training Sequences (FTS), the physical layer to count a number of good FTSs exchanged during a first link training between the PCIe components, a number of FTSs to be exchanged during a subsequent link training to be N reduced by the number of good FTSs exchanged during the first link training.
A system comprising:
- a multi-core processor including:
- an interface module to interface the multi-core processor to another component, the interface module comprising:
- a transaction layer;
- a data layer, the transaction layer and data layer to form packets that carry data between the processor and the other component;
- a physical layer, the physical layer to negotiate a link between the multi-core processor and the other component by exchanging a number (N) of Fast Training Sequences (FTS), the physical layer to count a number of good FTSs exchanged during a first link training between the multi-core processor and the other component, a number of FTSs to be exchanged during a subsequent link training to be N reduced by the number of good FTSs exchanged during the first link training.
A method comprising:
- establishing an initial number (N) of Fast Training Sequences (FTSs) to be exchanged during an initial link training;
- performing the initial link training between a first component and a second component;
- counting a number of good FTSs exchanged during the initial link training;
- and
- setting a number of FTSs to be exchanged during a subsequent link training to be N reduced by the number of good FTSs exchanged during the initial link training.
Dependencies are inferred from the claim text.