Utilization-aware low-overhead link-width modulation for power reduction in interconnects
AssigneeIntel Corporation
InventorsAnkush Varma, Buck W. Gremel, Robert G. Blankenship, Krishnakanth V. Sistla, Michael F. Cole
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Abstract
Methods and apparatus relating to low-overhead utilization-aware link-width modulation to reduce power consumption in interconnects are described. In one embodiment, a link width modulation logic adjusts the width of an interconnect link. More particularly, the link width modulation logic causes the interconnect link to transition from a first width to a second width based on comparison of a utilization value associated with the interconnect link against at least one of a plurality of utilization threshold values. Other embodiments are also disclosed and claimed.
Claims30
An apparatus comprising:
- a link width modulation logic to adjust a width of an interconnect link coupled between a first agent and a second agent,
- wherein the link width modulation logic is to cause the interconnect link to transition from a first width to a second width based on comparison of a utilization value of the interconnect link with at least one of a plurality of utilization threshold values.
A method comprising:
- adjusting a width of an interconnect link from a first width to a second width at a link width modulation logic, wherein the interconnect link is coupled between a first agent and a second agent;
- and
- comparing a utilization value of the interconnect link with at least one of a plurality of utilization threshold values,
- wherein adjusting the width of the interconnect link from the first width to the second width is to be performed based on a result of comparing the utilization value of the interconnect link with the at least one of the plurality of utilization threshold values.
A computing system comprising:
- a first processor core and a second processor core;
- a point-to-point interconnect link to couple the first and second processor cores;
- and
- a link width modulation logic to adjust a width of the interconnect link,
- wherein the link width modulation logic is to cause the interconnect link to transition from a first width to a second width based on comparison of a utilization value of the interconnect link with at least one of a plurality of utilization threshold values.
Dependencies are inferred from the claim text.