Method and Apparatus For Bus Lock Assistance
AssigneeIntel Corporation
InventorsRobert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parathasarthy, David W. Burns
Life of this patent
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Abstract
A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
Claims23
A method, comprising:
- detecting that an instruction of a thread is a locked instruction;
- determining that execution of said instruction includes imposing a bus lock;
- executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
The method of claim 7 further comprising detecting that bus lock assistance has been requested for said instruction as a pre-condition to executing said bus lock assistance function.
An apparatus, comprising:
- instruction identification logic circuitry that identifies whether an instruction is a locked instruction;
- bus lock assistance logic circuitry that identifies if bus lock assistance has been requested for said locked instruction;
- first logic circuitry to determine if execution of said instruction includes imposition of a bus lock;
- second logic circuitry to trigger a bus lock assistance function in response to a determination that said instruction is a bus lock instruction and that bus lock assistance has been requested, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
A machine readable medium containing program instructions that when processed by a processing core causes a method to be performed, said method comprising:
- writing to register space of a processing core to indicate that bus lock assistance has been requested, said bus lock assistance being functionality associated with a bus lock other than implementation of a bus lock protocol;
- receiving a flag from said processing core that indicates said bus lock assistance has been invoked.
Dependencies are inferred from the claim text.