Cpu of plc, system program for plc, and recording medium storing system program for plc
AssigneeOMRON Corporation
InventorsYoshihide NISHIYAMA, Osamu HAMASAKI, Shigeyuki EGUCHI
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AssigneeOMRON Corporation
InventorsYoshihide NISHIYAMA, Osamu HAMASAKI, Shigeyuki EGUCHI
Estimating the term…
A microprocessor controls at least one of a first communication circuit and a second communication circuit such that a first input/output process and a second input/output process are executed in parallel. The first input/output process includes a process outputting output data from a first transfer buffer, through the first communication circuit, to a first instrument in a PLC system bus, and a process inputting input data from the first instrument, through the first communication circuit, to the first transfer buffer. The second input/output process includes a process outputting output data from a second transfer buffer, through the second communication circuit, to a second instrument in a field network, and a process inputting input data from the second instrument, through the second communication circuit, to the second transfer buffer.
A CPU unit of a PLC controlling a control target, the CPU unit comprising:
A system program for a PLC in a CPU unit of the PLC, the system program being stored in a memory means and being executed by a microprocessor, wherein
A recording medium storing a system program for a PLC in a CPU unit of the PLC, the system program being stored in a memory means and being executed by a microprocessor, wherein
Dependencies are inferred from the claim text.