Noise Reduction and Tilt Reduction in Passive FET Multi-Phase Mixers
AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorReza Bagger
Life of this patent
Estimating the term…
Abstract
The noise response in a passive mixer circuit is improved by discharging the switching transistors in the mixer circuit in an appropriate time slot prior to activation. In addition to improving the noise response, tilt in conversion gains and linearity can be reduced. A passive mixer circuit includes bypass switches arranged in proximity to the switching transistors that make up the mixer core. These bypass switches, which are activated in intervals just prior to the active intervals of their neighboring switching transistors, discharge to ground accumulated charges on the switching transistors or on reactive components around switches.
Claims16
A passive mixer circuit comprising at least a first mixer branch, the first mixer branch comprising:
- first and second switching transistors connected from a first output signal terminal first and second input signal terminals, respectively, and arranged to be switched on by active levels of first and second local oscillator (LO) signals, respectively;
- third and fourth switching transistors connected from a second output signal terminal to the first and second input signal terminals, respectively, and arranged to be switched on by active levels of the second and first LO signals, respectively;
- wherein said passive mixer circuit is characterized by further comprising:
- a local oscillator (LO) circuit arranged to provide the first and second LO signals at an LO frequency, so that each of the first and second LO signals has an active-level duty cycle of less than 50% and so that the first and second LO signals are separated so as to form first inactive intervals in which neither of the first and second LO signals is at an active level, and to provide third and fourth, non-overlapping, LO signals at the LO frequency and that are each at active levels only during respective alternating ones of the first inactive intervals;
- and
- one or more high-side bypass switches connected between a circuit ground and the first input signal terminal and one or more low-side bypass switches connected between the circuit ground and the second input signal terminal, wherein the bypass switches are arranged so that at least one of the high-side bypass switches and at least one of the low-side bypass switches are activated, by the third and fourth LO signals, during each of the first inactive intervals.
A wireless communication device having a communication interface for wireless communicating with a remote communication device, the communication interface including a passive mixer circuit having at least a first mixer branch, the first mixer branch comprising:
- first and second switching transistors connected from a first output signal terminal to first and second input signal terminals, respectively, and arranged to be switched on by active levels of first and second local oscillator (LO) signals, respectively;
- third and fourth switching transistors connected from a second output signal terminal to the first and second input signal terminals, respectively, and arranged to be switched on by active levels of the second and first LO signals, respectively;
- wherein said passive mixer circuit is characterized by further comprising:
- a local oscillator (LO) circuit arranged to provide the first and second LO signals at an LO frequency, so that each of the first and second LO signals has an active-level duty cycle of less than 50% and so that the first and second LO signals are separated so as to form first inactive intervals in which neither of the first and second LO signals is at an active level, and to provide third and fourth, non-overlapping, LO signals at the LO frequency and that are each at active levels only during respective alternating ones of the first inactive intervals;
- and
- one or more high-side bypass switches connected between a circuit ground and the first input signal terminal and one or more low-side bypass switches connected-between the circuit ground and the second input signal terminal, wherein the bypass switches are arranged so that at least one of the high-side bypass switches and at least one of the low-side bypass switches are activated, by the third and fourth LO signals, during each of the first inactive intervals,
Dependencies are inferred from the claim text.