US 2013/0297831 A1 · Serial Bit Processor

Abstract

A serial bit processor is disclosed that configures a timer/counter module to determine a number of data bits to be decoded from a serial bit stream. In some implementations, a serial peripheral is coupled to a timer/counter module. The serial peripheral sends a restart command to reload an internal count register of the timer/counter module with a pre-defined value. The serial peripheral then sends count commands that cause the timer/counter to decrement (or increment) by one each time a count command is received. When the count reaches zero, a compare match command is generated and sent to the serial peripheral where it is used to resume or complete the decoding of data bits from the serial bit stream. In some implementations, a serial peripheral is included in a microcontroller that has an event system. The event system is used to communicate commands between peripherals.

Claims18

Dependent claims

A serial bit processor comprising:

a serial peripheral configured to receive a serial bit stream including data frames having data fields containing data bits;
and
a timer/counter module coupled to the serial peripheral and configured to generate an outbound command for use by the serial peripheral to decode the data bits from the data fields, where the outbound command is based on inbound commands provided by the serial peripheral, where the inbound commands control the decrementing or incrementing of a timer or counter in the timer/counter module, and a first command of the inbound commands starts or restarts the timer or counter and a second command of the inbound commands causes the timer or counter to decrement or increment.

Dependencies are inferred from the claim text.

Serial Bit Processor

Life of this patent

Serial Bit Processor

Life of this patent

Abstract

Claims18