Back to results
US 2013/0295698 A1Published application
Lithographic targets for uniformity control
AssigneeCarl Zeiss SMS GmbH
InventorsRainer Pforr, Guy Ben-Zvi, Vladimir Dmitriev, Erez Graitzer
Life of this patent
Estimating the term…
Abstract
A photo mask having a first set of patterns and a second set of patterns is provided in which the first set of patterns correspond to a circuit pattern to be fabricated on a wafer, and the second set of patterns have dimensions such that the second set of patterns do not contribute to the circuit pattern that is produced using a lithography process based on the first set of patterns under a first exposure condition. The critical dimension distribution of the photo mask is determined based on the second set of patterns that do not contribute to the circuit pattern produced using the lithography process based on the first set of patterns under the first exposure condition.
Claims49
A method comprising:
- providing a first photo mask having a first set of patterns and a second set of patterns, the first set of patterns corresponding to a circuit pattern to be fabricated on a wafer, the second set of patterns having dimensions such that the second set of patterns do not contribute to the circuit pattern that is produced using a lithography process based on the first set of patterns under a first exposure condition;
- and
- determining critical dimension distribution of the first photo mask based on the second set of patterns that do not contribute to the circuit pattern produced using the lithography process based on the first set of patterns under the first exposure condition.
A method comprising:
- providing a first photo mask having a first pattern and a second pattern, the first pattern corresponding to a circuit pattern to be fabricated on a wafer, the second pattern having dimensions such that the second pattern does not contribute to the circuit pattern that is produced using a lithography process based on the first pattern under a first exposure dose;
- and measuring exposure system aware mask registration using the second pattern under a second exposure dose different from the first exposure dose to determine both displacement errors of features on the first photo mask and exposure tool induced displacement errors.
A method comprising:
- providing a first photo mask having a first pattern and a second pattern, the first pattern corresponding to a first circuit pattern to be fabricated on a wafer, the second pattern having dimensions such that the second pattern does not contribute to the first circuit pattern that is produced using a lithography process based on the first pattern under a first exposure condition;
- providing a second photo mask having a third pattern and a fourth pattern, the third patterns corresponding to a second circuit pattern to be fabricated on the wafer, the fourth pattern having dimensions such that the fourth pattern does not contribute to the second circuit pattern that is produced using a lithography process based on the third patterns under a third exposure condition;
- printing the second pattern on a photoresist layer under a second exposure condition;
- printing the fourth pattern on the photoresist layer under a fourth exposure condition;
- and
- determining overlay error between the second and fourth patterns printed on the photoresist layer.
3 more elements
A method comprising:
- providing a first photo mask having a first pattern and a second pattern, the first pattern corresponding to a first circuit pattern to be fabricated on a wafer, the second pattern having dimensions such that the second pattern does not contribute to the first circuit pattern that is produced using a lithography process based on the first pattern under a first exposure condition;
- providing a second photo mask having a third pattern and a fourth pattern, the third patterns corresponding to a second circuit pattern to be fabricated on the wafer, the fourth pattern having dimensions such that the fourth pattern does not contribute to the second circuit pattern that is produced using a lithography process based on the third pattern under a third exposure condition, the first and second circuit patterns being associated with an overall circuit pattern;
- printing the second pattern on a first wafer under a second exposure condition;
- printing the fourth pattern on a second wafer under a fourth exposure condition;
- measuring registration of the second pattern on the first wafer;
- measuring registration of the fourth pattern on the second wafer;
- and
- determining an overlay error between the second and fourth patterns based on the measurements of the wafer registration of the second pattern and the wafer registration of the fourth pattern.
5 more elements
-318. (canceled)
Dependencies are inferred from the claim text.