Double-sampling receiver with dynamic offset modulation for optical and electrical signaling
AssigneeCalifornia Institute of Technology
InventorsAzita Emami-Neyestanak, Meisam Hoarvar Nazari, Saman Saeedi
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Abstract
A receiver architecture is disclosed which employs an RC double-sampling front-end and dynamic offset modulation technique. A low-voltage double-sampling technique provides high power efficiency by avoiding linear high-gain elements conventionally employed in typical transimpedance-amplifier (TIA) receivers. In addition, a demultiplexed output of the receiver helps save power in the subsequent digital blocks. Various applications are described including optical receivers, electrical on-chip interconnects, as well as pulse amplitude modulation. The receiver can be implemented in CMOS and is scalable and portable to other technologies.
Claims24
An apparatus for signal receiving, comprising:
- a front-end for signal communication including:
- a double sampling circuit for sampling an input voltage, at the end of two consecutive bit times, producing a voltage difference used to determine a signal received on the front end;
- and
- a dynamic offset modulation (DOM) circuit for applying a dynamic offset voltage to the voltage difference, wherein the DOM circuit avoids input-dependent performance degradation and the front-end has a bandwidth that is at least an order of magnitude less than a bandwidth of the signal.
A method for signal receiving, comprising:
- receiving an input voltage at a front-end including a transimpedance amplifier (TIA) coupled to a capacitor;
- sampling the input voltage at an end of two consecutive bit times and determining a voltage difference of the sampled input voltage at the end of the two consecutive bit times, using a double sampling circuit;
- and
- applying a dynamic offset voltage to the voltage difference with an offset voltage circuit.
Dependencies are inferred from the claim text.