Memory cell having flexible read/write assist and method of using
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJonathan Tsung-Yung CHANG, Kun-Hsi LI, Chiting CHENG
Life of this patent
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Abstract
A semiconductor device includes at least one memory cell die. The at least one memory cell die includes a data storage unit. The at least one memory cell die includes at least one read assist enabling unit electrically connected to the data storage unit. The at least one read assist enabling unit configured to lower a voltage of a word line. The memory cell die also includes at least one write assist enabling unit electrically connected to the data storage unit. The at least one write assist enabling unit configured to supply a negative voltage to at least one of a bit line or a bit line bar.
Claims20
A semiconductor device comprising:
- at least one memory cell die, wherein the at least one memory cell die comprises:
- a data storage unit;
- at least one read assist enabling unit electrically connected to the data storage unit, the at least one read assist enabling unit configured to lower a voltage of a word line;
- and
- at least one write assist enabling unit electrically connected to the data storage unit, the at least one write assist enabling unit configured to apply a negative voltage to at least one of a bit line or a bit line bar.
A semiconductor wafer comprising:
- a plurality of dies, each of the plurality of dies comprising:
- a data storage unit;
- at least one read assist enabling unit electrically connected to the data storage unit, the at least one read assist enabling unit configured to lower a voltage of a word line;
- and
- at least one write assist enabling unit electrically connected to the data storage unit, the at least one write assist enabling unit configured to supply a negative voltage to at least one of a bit line or a bit line bar.
A method of enabling read assist or write assist comprising:
- forming at least one memory cell die, wherein the memory cell die comprises:
- a data storage unit
- at least one read assist enabling unit electrically connected to the data storage unit, the at least one read assist enabling unit configured to lower a voltage of a word line;
- and
- at least one write assist enabling unit electrically connected to the data storage unit, the at least one write assist enabling unit configured to supply a negative voltage to at least one of a bit line or a bit line bar;
- determining a performance of the at least one memory cell die;
- and
- selectively activating at least one of the at least one read assist enabling unit or the at least one write assist enabling unit based on the performance of the at least one memory cell die.
Dependencies are inferred from the claim text.