Switch and semiconductor device including the switch

A device comprising:

• a non-volatile memory array;
• an internal line coupled to the non-volatile memory array;
• a voltage line configured to take at least first and second voltage levels in a program of the non-volatile memory array, the first and second voltage levels being different from each other;
• a first circuit configured to produce a first electrical path from the voltage line to the internal line in response to a selection signal;
• a second circuit configured to produce a second electrical path connecting from the voltage line to the internal line in response to the selection signal,
• one of the first and second electrical paths being produced when the voltage line takes the first voltage level, and both of the first and second electrical paths being produced when the voltage line take the second voltage level.

A device comprising:

• a first transistor of a first channel type coupled between first and second nodes, including a control gate supplied with a first control signal having a first phase;
• a second transistor of a second channel type different from the first channel type including a first terminal coupled to the first node, a second terminal coupled to a third node, a back gate coupled to the first terminal thereof, and a control gate supplied with a second control signal having a second phase substantially opposite to the first phase;
• a third transistor of the second channel type including a first terminal coupled to the second node, a second terminal coupled to the third node, a back gate coupled to the first terminal thereof, and a control gate supplied with the second control signal;
• and
• a protection circuit coupled between the first and second node so that the protection circuit, the second transistor and the third transistor are connected in series, the protection circuit being supplied with the first control signal.