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US 2013/0294152 A1Published application
Apparatuses and methods including memory access in cross point memory
AssigneeMicron Technology, Inc.
InventorsDerChang Kau, Gianpaolo Spadini
Life of this patent
Estimating the term…
Abstract
Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
Claims68
An apparatus comprising:
- a memory cell;
- first and second conductive lines configured to access the memory cell;
- and
- a switch configured to apply a signal to one of the first and second conductive lines, wherein the switch includes a variable resistance material.
1 more element
An apparatus comprising:
- memory cells;
- first conductive lines and second conductive lines configured to access the memory cells;
- and
- switches, each of the switches being coupled between one of the first conductive lines and an additional conductive line, wherein each of the switches includes a phase change material.
1 more element
An apparatus comprising:
- a first memory array including first memory cells and a first group of conductive lines configured to access the first memory cells;
- a second memory array including second memory cells and a second group of conductive lines configured to access the second memory cells;
- a first group of transistors coupled to the first group of conductive lines, the first group of transistors configured to respond to a first signal;
- a first switching circuit configured to apply a signal to a selective conductive line of the first group of conductive lines, wherein the first switching circuit includes a phase change material;
- a second group of transistors coupled to the second group of conductive lines, the second group of transistors configured to respond to a second signal;
- and
- a second switching circuit configured to apply the signal to a selective conductive line of the second group of conductive lines, wherein the second switching circuit includes a phase change material.
4 more elements
An apparatus comprising:
- a memory array including memory cells and a group of conductive lines configured to access the memory cells;
- a group of resistors coupled to the group of conductive lines;
- a switching circuit configured to apply a signal to a selective conductive line of the group of conductive lines, wherein the switching circuit includes a phase change material;
- and
- a group of transistors configured to selectively apply a signal to a conductive line of the group of conductive lines through a resistor of the group of resistors.
2 more elements
An apparatus comprising:
- conductive lines located in a first device level of a device and extending in a first direction;
- conductive lines located in a second device level of the device and extending in a second direction;
- a first plurality of device structures located in a third device level of the device and configured to store information, the third device level being between the first and second device levels, each device structure in the first plurality of device structures being located between one of the conductive lines extending in the first direction and one of the conductive lines extending in the second direction;
- and
- a second plurality of device structures located in the third device level, each device structure in the second plurality of device structures being located between one of the conductive lines extending in the first direction and one of the conductive lines extending in the second direction, wherein the second plurality of device structures is not configured to store information.
2 more elements
A method comprising:
- applying a first voltage to a first conductive line coupled to memory cells during a first time interval of a memory operation;
- applying a second voltage to a second conductive line during the first time interval, the second conductive line being coupled to a selected memory cell among the memory cells, wherein an access component in the selected memory cell remains in a nonconductive state during the first time interval;
- causing the access component in the selected memory cell to change from the nonconductive state to a conductive state during a second time interval of the memory operation, wherein causing includes applying a third voltage to the first conductive line during the second time interval through a switch coupled to the first conductive line.
A method comprising:
- applying a first voltage to a first conductive line through a first transistor during a first time interval of a memory operation to access a selected memory cell among memory cells coupled to the first conductive line;
- applying a second voltage to a second conductive line through a second transistor during the first time interval, the second conductive line being coupled to the selected memory cell;
- applying a third voltage to the first conductive line through a first switch during a second time interval of the memory operation;
- and
- applying a fourth voltage to the second conductive line through a second switch during the second time interval.
2 more elements
A method comprising:
- forming a first group of conductive lines;
- forming a second group of conductive lines;
- forming memory cells, wherein the memory cells are formed such that each of the memory cells is located between a conductive line in the first group of conductive lines and a conductive line in the second groups of conductive lines;
- and
- forming switches, wherein the switches are formed such that each of the switches is located between a conductive line in the first group of conductive lines and one or more conductive line in the second groups of conductive lines, wherein each of the switches includes a phase change material.
2 more elements
Dependencies are inferred from the claim text.