Resistance change memory

A resistance change memory comprising:

• first lines extending in a first direction;
• second lines extending in a second direction crossing the first direction;
• memory cells each including a resistance change element, and each provided between one of the first lines and one of the second lines;
• and
• a control circuit configured to:
• generate a first voltage pulse using a power source,
• apply a second voltage pulse to one of the first lines, the second voltage pulse having a rise time longer than a rise time of the first voltage pulse, and
• apply a first potential to an one of the second lines.

A resistance change memory comprising:

• first lines extending in a first direction;
• second lines extending in a second direction crossing the first direction;
• memory cells each including a resistance change element, and each provided between one of the first lines and one of the second lines;
• and
• a control circuit configured to:
• generate a first voltage pulse using a power source,
• apply a second voltage pulse to one of the first lines, the second voltage pulse having a fall time longer than a fall time of the first voltage pulse, and
• apply a first potential to an one of the second lines.

A resistance change memory comprising:

• first lines extending in a first direction;
• second lines extending in a second direction crossing the first direction;
• memory cells each including a resistance change element, and each provided between one of the first lines and one of the second lines;
• and
• a control circuit configured to:
• apply a first voltage pulse having a rise time from 10 nsec to 20 nsec to one of the first lines, and
• apply a first potential to an one of the second lines.

A resistance change memory comprising:

• first lines extending in a first direction;
• second lines extending in a second direction crossing the first direction;
• memory cells each including a resistance change element, and each provided between one of the first lines and one of the second lines;
• and
• a control circuit configured to:
• apply a first voltage pulse having a fall time which is from 10 nsec to 20 nsec to one of the first lines, and
• apply a first potential to an one of the second lines.