US 2013/0293280 A1 · Method and Apparatus for use in Improving Linearity of MOSFETs using an Accumulated Charge Sink

Abstract

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Claims82

Dependent claims

An RF switch, comprising:

a first RF port;
a second RF port;
a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration;
a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration,
wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, and a first accumulated charge sink (ACS) coupled to the first body,
wherein a first ACS bias voltage is applied to the first ACS,
wherein the first ACS is in electrical communication with the first body and is configured so that when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is operated in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET;
and
wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate.

6 more elements

An RF switch, comprising:

a first RF port;
a second RF port;
a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration;
a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration,
wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body,
wherein a first ACS bias voltage is applied to the first ACS and second ACS,
wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET;
and
wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate.

6 more elements

An RF switch, comprising:

a first RF port;
a second RF port;
a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration;
a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration,
wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body,
wherein a first ACS bias voltage is applied to the first ACS and second ACS,
wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially more negative than the lesser of a first source bias voltage applied to the first source and a first drain bias voltage applied to the first drain to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET;
and
wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate.

6 more elements

Dependencies are inferred from the claim text.

Method and Apparatus for use in Improving Linearity of MOSFETs using an Accumulated Charge Sink

Life of this patent

Method and Apparatus for use in Improving Linearity of MOSFETs using an Accumulated Charge Sink

Life of this patent

Abstract

Claims82