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US 2013/0293259 A1Published application
Homogeneous dual-rail logic for dpa attack resistive secure circuit design
AssigneeThe Regents of the University of California
InventorsKazuyuki Tanimura, Nikil Dutt
Life of this patent
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Abstract
Homogenous dual-rail logic for DPA attack resistive secure circuit design is disclosed. According to one embodiment, an HDRL circuit comprises a primary cell and a complementary cell, wherein the complementary cell is an identical duplicate of the primary cell. The HDRL circuit comprises a first set of inputs and a second set of inputs, wherein the second set of inputs are a negation of the first set of inputs. The HDRL circuit has a differential power at a level that is resistive to DPA attacks.
Claims22
1-19. (canceled)
A method, comprising:
- inputting a first input to an individual one of one or more primary cells of a circuit, the circuit comprising one or more primary cells and a complementary cell positioned adjacent to the individual one of the one or more primary cells, wherein the complementary cell is a duplicate of the individual one of the one or more primary cells;
- and
- inputting a second input to the complementary cell, wherein the second input is a negation of the first input.
A circuit, comprising:
- a primary cell;
- a complementary cell, wherein the complementary cell is a duplicate of the primary cell;
- a first input;
- and
- a second input, wherein the second input is a negation of the first input.
2 more elements
A module, comprising:
- a circuit implementing a cryptographic algorithm, the circuit comprising
- a primary cell;
- a complementary cell, wherein the complementary cell is a duplicate of the primary cell;
- a first input;
- and
- a second input, wherein the second input is a negation of the first input.
3 more elements
Dependencies are inferred from the claim text.