Test device for testing a pop stacked-chip

A test device for testing a bottom chip of a package-on-package (PoP) stacked-chip, an upper surface of the bottom chip having a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip, the test device comprising:

• a test head, having the top chip installed inside,
• a plurality of test probes, the first end of the plurality of the test probes electrically connected to the corresponding soldering points of the top chip inside the test head, and the second ends of the test probes extending outward from a lower surface of the test head;
• a nozzle, installed about the center of the lower surface of the test head, for vacuum absorbing the bottom chip;
• and
• an air flow passage, penetrating the test head and connecting the nozzle, for exhausting the air flow so as to generate the absorbing force.