Testing system for Testing Semiconductor Package stacking Chips and Semiconductor Automatic Tester thereof

A semiconductor automatic tester for testing package stacking chips, comprising:

• a testing area configuring a test board having a testing socket for loading a chip-under-test;
• a charging area configuring a tray for loading the chip-under-test of waiting the test;
• a discharging area configuring a tray for loading the chip-under-test of completing the test;
• a pick-up arm for moving the chip-under-test loaded on the tray in the charging area, on the tray in the discharging area and on the socket in the testing area;
• a testing arm located over the testing socket for moving in the vertical direction;
• and
• a testing mechanism for moving to an upper position over the testing socket and leaving the upper position, the testing mechanism comprising a probe testing device having a testing chip inside and a plurality of testing probes electrically connected to the testing chip, the plurality of testing probes extending toward the testing socket for contacting the chip-under-test loaded on the testing socket;
• wherein when the pick-up arm moves the chip-under-test from the tray in the charging area to the testing area, the testing arm moves the chip-under-test to the testing socket of the test board, and when the testing mechanism moves to the upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop, and then the pick-up arm moves the chip-under-test of completing the test to the tray in the discharging area.