# US 2013/0278804 A1 · Repartitioned digital pixel

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- Number: US 2013/0278804 A1
- Document ID: US20130278804A1
- Status: Published application
- Kind: A1
- Application number: 13/866,066
- Filed: 2013-04-19
- Published: 2013-10-24
- Earliest claimed: 2012-04-19
- Assignees: Raytheon Company
- Applicants: Raytheon Company
- Inventors: Martin S. Denham; Christian M. Boemler
- Web page: https://patentgrep.com/patent/US20130278804A1

## CPC

- H04N 25/46: by combining or binning pixels
- H04N 25/57: Control of the dynamic range
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H04N 25/772: comprising A/D, V/T, V/F, I/T or I/F converters
- H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
- Y10T 29/49128: Assembling formed circuit to base
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

An imaging system includes an array of pixel cells and a plurality of digital memory elements disposed physically separate from and coupled to the array of pixel cells. Each of the pixel cells includes a photodetector, an electrical storage device coupled to the photodetector, and quantization circuitry coupled to the electrical storage device. The photodetector is configured to generate a photo-current in response to light impinging thereon. The electrical storage device is configured to accumulate an electrical charge from the photo-current. The quantization circuitry is configured to convert the electrical charge into an analog quantization event signal. Each of the digital memory elements is in electrical communication with at least one of the pixel cells and is configured to store a digital value in response to receiving the analog quantization event signal from the at least one of the pixel cells.

## Claims

### Claim 1

An imaging system comprising:
an array of pixel cells, each of the pixel cells including:
a photodetector configured to generate a photo-current in response to light impinging thereon,
an electrical storage device coupled to the photodetector and configured to accumulate an electrical charge from the photo-current, and
quantization circuitry coupled to the electrical storage device and configured to convert the electrical charge into an analog quantization event signal; and
a plurality of digital memory elements disposed physically separate from and coupled to the array of pixel cells, each of the digital memory elements being in electrical communication with at least one of the pixel cells and configured to store a digital value in response to receiving the analog quantization event signal from the at least one of the pixel cells, the digital value corresponding to an intensity of the light impinging upon the photodetector of the at least one of the pixel cells.

### Claim 2 (depends on 1)

The imaging system of claim 1, further comprising a read-out integrated circuit (ROIC) chip including the array of pixel cells.

### Claim 3 (depends on 2)

The imaging system of claim 2, wherein the plurality of digital memory elements is disposed adjacent to the ROIC chip.

### Claim 4 (depends on 2)

The imaging system of claim 2, wherein the ROIC chip has a first portion including the array of pixel cells and a second portion that is different than the first portion, the second portion including the plurality of digital memory elements.

### Claim 5 (depends on 1)

The imaging system of claim 1, wherein the plurality of digital memory elements includes at least one of a static random access memory (SRAM) and a register file.

### Claim 6 (depends on 1)

The imaging system of claim 1, further comprising a plurality of strobe lines, wherein each of the plurality of strobe lines is electrically coupled to one of the digital memory elements and to the quantization circuitry of at least one of the pixel cells, the plurality of strobe lines being configured to send a strobe signal to the quantization circuitry at periodic time intervals.

### Claim 7 (depends on 6)

The imaging system of claim 6, wherein the quantization circuitry is configured to determine whether the electrical charge in the electrical storage device exceeds a predetermined threshold value in response to receiving the strobe signal.

### Claim 8 (depends on 7)

The imaging system of claim 7, wherein the quantization circuitry is further configured to generate the analog quantization event signal in response to determining that the electrical charge in the electrical storage device exceeds the predetermined threshold value.

### Claim 9 (depends on 8)

The imaging system of claim 8, further comprising a plurality of analog-to-digital converters, each of the plurality of analog-to-digital converters having an input and an output, wherein each of the plurality of analog-to-digital converters is coupled at the input to the quantization circuitry of at least one of the pixel cells and coupled at the output to at least one of the plurality of digital memory elements, each of the plurality of analog-to-digital converters being configured to convert the analog quantization event signal into the digital value.

### Claim 10

A method of detecting an image, the method comprising:
for each of a plurality of pixels in an array of pixel cells, storing an electrical charge generated by the pixel in one of a plurality of electrical storage devices associated with the respective pixel, the electrical charge being generated response to radiation impinging upon the pixel;
periodically determining whether a cumulative electrical charge in the respective electrical storage device exceeds a predetermined threshold value; and
in response to determining that the cumulative electrical charge stored in the respective electrical storage device exceeds the predetermined threshold value, reducing the electrical charge stored in the respective electrical storage device by a predetermined charge reduction amount and incrementing one of a plurality of digital counter values stored in a digital counter and associated with the respective pixel, the digital counter being included in a plurality of digital memory elements in electrical communication with the array of pixel cells, the plurality of digital memory elements being disposed physically separate from and coupled to the array of pixel cells.

### Claim 11 (depends on 10)

The method of claim 10, further comprising periodically converting a residual electrical charge in the respective electrical storage device into an analog signal.

### Claim 12 (depends on 11)

The method of claim 11, further comprising converting the analog signal into the respective digital counter value using one of a plurality of analog-to-digital converters associated with the respective pixel.

### Claim 13 (depends on 12)

The method of claim 12, further comprising converting at least one of the respective digital counter value and the respective digital binary value into one of a plurality of pixels in an output video frame.

### Claim 14 (depends on 13)

The method of claim 13, further comprising encoding the output video frame.

### Claim 15 (depends on 10)

The method of claim 10, further comprising providing a read-out integrated circuit (ROIC) chip including the array of pixel cells.

### Claim 16 (depends on 15)

The method of claim 15, further comprising providing the plurality of digital memory elements on a chip that is separate from the ROIC chip.

### Claim 17 (depends on 15)

The method of claim 15, further comprising:
providing the array of pixel cells on a first portion of the ROIC chip; and
providing the plurality of digital memory elements on a second portion of the ROIC chip that is different than the first portion.

### Claim 18 (depends on 10)

The method of claim 10, wherein periodically determining whether a cumulative electrical charge in the respective electrical storage device exceeds a predetermined threshold value is performed for each of the plurality of pixels over the course of a plurality of clock cycles.

### Claim 19

A method of manufacturing a read-out integrated circuit (ROIC) chip, the method comprising:
disposing, on a substrate, an array of pixel cells, each pixel cell including a photodetector, a capacitor coupled to the photodetector, and a comparator coupled to the capacitor; and
disposing, on the substrate and adjacent to the array of pixel cells, an array of memory elements, each memory element including a counter and a storage device coupled to the counter.

### Claim 20 (depends on 19)

The method of claim 19, further comprising disposing, on the substrate, a plurality of analog-to-digital conversion (ADC) circuits between the array of pixel cells and the array of memory elements, each of the ADC circuits being coupled to at least one pixel cell and at least one memory element.