# US 2013/0278338 A1 · Trans-impedance amplifier for high speed optical-electrical interfaces > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0278338 A1 - Document ID: US20130278338A1 - Status: Published application - Kind: A1 - Application number: 13/864,739 - Filed: 2013-04-17 - Published: 2013-10-24 - Earliest claimed: 2012-04-18 - Assignees: STMicroelectronics S.r.l. - Applicants: Stmicroelectronics S.R.L. - Inventors: Enrico Stefano TEMPORITI MILANI; Wissam Yussef Sabri EYSSA; Gabriele MINOIA - Web page: https://patentgrep.com/patent/US20130278338A1 ## CPC - H03F 3/45076: {characterised by the way of implementation of the active amplifying circuit in the differential amplifier} - H03F 3/087: {with IC amplifier blocks (H03F3/085 takes precedence)} - H04B 10/693: {Arrangements for optimizing the preamplifier in the receiver} - H03F: AMPLIFIERS - H04B: TRANSMISSION ## Abstract The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications. ## Claims ### Claim at position 1 1-7. (canceled) ### Claim 8 A differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes; at least one trans-resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two identical photodiode biasing resistances each greater than said at least one trans-resistance, each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. ### Claim 9 (depends on 8) The differential trans-impedance amplifier circuit of claim 8, wherein said at least one trans-resistance comprises a pair of trans-resistances. ### Claim 10 (depends on 8) The differential trans-impedance amplifier circuit of claim 8, wherein said pair of identical trans-resistances comprises a pair of identical trans-resistances. ### Claim 11 (depends on 9) The differential trans-impedance amplifier circuit of claim 9, wherein each of said pair of trans-resistances is coupled to a respective one of said input nodes of said amplifier. ### Claim 12 (depends on 9) The differential trans-impedance amplifier circuit of claim 9, further comprising at least one peaking inductor coupled in series between said pair of trans-resistances. ### Claim 13 (depends on 12) The differential trans-impedance amplifier circuit of claim 12, wherein said at least one peaking inductor comprises a midpoint tap. ### Claim 14 (depends on 13) The differential trans-impedance amplifier circuit of claim 13, further comprising at least one electrostatic protection device coupled to said midpoint tap. ### Claim 15 (depends on 12) The differential trans-impedance amplifier circuit of claim 12, wherein said at least one peaking inductor comprises a pair thereof coupled in series, and defining a midpoint tap therebetween. ### Claim 16 (depends on 15) The differential trans-impedance amplifier circuit of claim 15, further comprising at least one electrostatic protection device coupled to said midpoint tap. ### Claim 17 (depends on 8) The differential trans-impedance amplifier circuit of claim 8, wherein said at least one said trans-resistance has a programmable value. ### Claim 18 (depends on 8) The differential trans-impedance amplifier circuit of claim 8, further comprising a control loop configured to maintain a constant reverse bias voltage on said photodiode upon changing operating conditions. ### Claim 19 An electronic device comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a voltage on said pair of input nodes; a photodiode; a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes; at least one trans-resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two photodiode biasing resistances each greater than said at least one trans-resistance, each photodiode biasing resistance coupled in series between said photodiode and a respective voltage. ### Claim 20 (depends on 19) The electronic device of claim 19, wherein said at least one trans-resistance comprises a pair of trans-resistances. ### Claim 21 (depends on 20) The electronic device of claim 20, wherein said pair of identical trans-resistances comprises a pair of identical trans-resistances. ### Claim 22 (depends on 20) The electronic device of claim 20, wherein each of said pair of trans-resistances is coupled to a respective one of said input nodes of said amplifier. ### Claim 23 (depends on 20) The electronic device of claim 20, further comprising at least one peaking inductor coupled in series between said pair of trans-resistances. ### Claim 24 (depends on 23) The electronic device of claim 23, wherein said at least one peaking inductor comprises a midpoint tap. ### Claim 25 (depends on 24) The electronic device of claim 24, further comprising at least one electrostatic protection device coupled to said midpoint tap. ### Claim 26 (depends on 23) The electronic device of claim 23, wherein said at least one peaking inductor comprises a pair thereof coupled in series, and defining a midpoint tap therebetween. ### Claim 27 (depends on 26) The electronic device of claim 26, further comprising at least one electrostatic protection device coupled to said midpoint tap. ### Claim 28 (depends on 19) The electronic device of claim 19, wherein said at least one said trans-resistance has a programmable value. ### Claim 29 (depends on 19) The electronic device of claim 19, further comprising a control loop configured to maintain a constant reverse bias voltage on said photodiode upon changing operating conditions. ### Claim 30 A method comprising: generating an amplified replica of a voltage on a pair of input nodes of an amplifier coupled to a photodiode via a pair of DC-blocking capacitors, with at least one trans-resistance coupled between the pair of input nodes of the amplifier; and reverse biasing the photodiode using a bias network comprising two photodiode biasing resistances each greater than the at least one trans-resistance, each photodiode biasing resistance coupled in series between the photodiode and a respective voltage. ### Claim 31 (depends on 30) The method of claim 30, wherein the at least one trans-resistance comprises a pair of trans-resistances. ### Claim 32 (depends on 31) The method of claim 31, wherein the pair of identical trans-resistances comprises a pair of identical trans-resistances. ### Claim 33 (depends on 30) The method of claim 30, wherein each of the pair of trans-resistances is coupled to a respective one of the input nodes of the amplifier. ### Claim 34 (depends on 30) The method of claim 30, wherein the at least one the trans-resistance has a programmable value. ### Claim 35 (depends on 30) The method of claim 30, further comprising maintaining a constant reverse bias voltage on the photodiode upon changing operating conditions.