# US 2013/0278334 A1 · Slew rate and bandwidth enhancement in reset > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0278334 A1 - Document ID: US20130278334A1 - Status: Published application - Kind: A1 - Application number: 13/591,136 - Filed: 2012-08-21 - Published: 2013-10-24 - Earliest claimed: 2012-04-18 - Assignees: Cypress Semiconductor Corporation - Inventors: Saravanan V. Murugesan; Paul Walsh; Gerard Baldwin; Kaveh Hosseini - Web page: https://patentgrep.com/patent/US20130278334A1 ## CPC - H03F 3/3022: {CMOS common source output SEPP amplifiers (H03F3/3008 takes precedence)} - H03F 3/45192: {Folded cascode stages} - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03F 2203/45514: the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC - H03F 2203/45536: the FBC comprising a switch and being coupled between the LC and the IC - H03F: AMPLIFIERS ## Abstract Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor. ## Claims ### Claim 1 An integrating amplifier comprising: an input stage including an inverting input coupled to an electrode of a sense capacitor to sense a capacitance thereof and a non-inverting input coupled to a reference potential; and an output stage including a compensating capacitor coupled to an output, the compensating capacitor comprising two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor when the integrating amplifier is operated in RESET mode. ### Claim 2 (depends on 1) The integrating amplifier of claim 1, further comprising a plurality of diode connected devices coupled in parallel when the integrating amplifier is operated in RESET mode to provide greater stability. ### Claim 3 (depends on 3) The integrating amplifier of claim 3, wherein the integrating amplifier comprises parallel diode connected devices, and wherein one of the parallel diode connected devices is switched into an output stage current path when the integrating amplifier is operated in RESET mode to provide greater stability. ### Claim 4 (depends on 1) The integrating amplifier of claim 1, further comprising an integration capacitor and switch coupled in parallel between the inverting input of the integrating amplifier and the output, wherein the switch is opened when the integrating amplifier is operated in an integration mode to accumulate charge from the sense capacitor, and closed during RESET mode to reset the integration capacitor. ### Claim 5 (depends on 1) The integrating amplifier of claim 1, wherein the two smaller capacitors of the compensating capacitor comprise capacitances selected so that the capacitance of the compensating capacitor is decreased by at least 10% when the integrating amplifier is operated in RESET mode. ### Claim 6 (depends on 1) The integrating amplifier of claim 1, wherein the two smaller capacitors of the compensating capacitor comprise capacitances selected so that the capacitance of the compensating capacitor is decreased by about 50% when the integrating amplifier is operated in RESET mode. ### Claim 7 A capacitance sensing system comprising: an integrating amplifier including an input stage including an inverting input coupled to an electrode of a sense capacitor to be sensed and a non-inverting input coupled to a reference voltage, and an output stage including a compensating capacitor coupled to an output; an integration capacitor coupled between the inverting input of the integrating amplifier and the output to accumulate charge from the sense capacitor when the integrating amplifier is operated in an integration mode; and a switch coupled in parallel with the integration capacitor between the inverting input of the integrating amplifier and the output, the switch configured to be open in integration mode and closed when the integrating amplifier is operated in RESET mode to reset the capacitor, wherein the integrating amplifier further comprises a device to increase an output stage current when the integrating amplifier is operated in RESET mode. ### Claim 8 (depends on 7) The capacitance sensing system of claim 7, wherein the device to increase the output stage current comprises a plurality of diode connected devices coupled in parallel. ### Claim 9 (depends on 7) The capacitance sensing system of claim 7, wherein the device to increase the output stage current comprises parallel diode connected devices, and wherein one of the parallel diode connected devices is switched into an output stage current path when the integrating amplifier is operated in RESET mode to provide greater stability. ### Claim 10 (depends on 7) The capacitance sensing system of claim 7, wherein the compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor when the integrating amplifier is operated in RESET mode. ### Claim 11 (depends on 10) The capacitance sensing system of claim 10, wherein the two smaller capacitors of the compensating capacitor comprise capacitances selected so that the capacitance of the compensating capacitor is decreased by at least 10% when the integrating amplifier is operated in RESET mode. ### Claim 12 The capacitance sensing system 10, wherein the two smaller capacitors of the compensating capacitor comprise capacitances selected so that the capacitance of the compensating capacitor is decreased by about 50% when the integrating amplifier is operated in RESET mode. ### Claim 13 A method for sensing capacitance of a capacitor, comprising: accumulating a charge received on a receive electrode of a sense capacitor using a capacitance sensing system including an integrating amplifier comprising an input stage including an inverting input coupled to the receive electrode, and an output stage including a compensating capacitor coupled to an output; and resetting the capacitance sensing system after a period of time, wherein resetting the capacitance sensing system comprises increasing the slew rate and gain-bandwidth (GBW) of the integrating amplifier. ### Claim 14 (depends on 13) The method of claim 13, wherein increasing the slew rate and GBW of the integrating amplifier comprises decreasing capacitance of the compensating capacitor while the integrating amplifier is operated in a RESET mode. ### Claim 15 (depends on 14) The method of claim 14, wherein the compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in RESET mode, and wherein decreasing capacitance of the compensating capacitor comprises opening the switching element to decouple one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor. ### Claim 16 (depends on 14) The method of claim 14, wherein decreasing capacitance of the compensating capacitor while the integrating amplifier is operated in a RESET mode comprises decreasing capacitance of the compensating capacitor by about 50%. ### Claim 17 (depends on 13) The method of claim 13, wherein the capacitance sensing system further comprises an integration capacitor and switch coupled in parallel between the inverting input of the integrating amplifier and the output, and wherein resetting the capacitance sensing system further comprises closing the switch to reset the integration capacitor. ### Claim 18 (depends on 13) The method of claim 13, wherein resetting the capacitance sensing system further comprises increasing an output stage current of the integrating amplifier to provide greater stability. ### Claim 19 (depends on 18) The method of claim 18, wherein the capacitance sensing system further comprises a first diode connected device, and wherein increasing an output stage current of the integrating amplifier comprises enabling a second diode connected device in parallel with the first diode connected device when the integrating amplifier is operated in RESET mode. ### Claim 20 (depends on 13) The method of claim 13, wherein resetting the capacitance sensing system does not comprise decoupling the receive electrode from the capacitance sensing system.