Method and Apparatus for Improving Efficiency of Programmable Logic Circuit Using Cascade Configuration
OwnerTe-Tse Jang, James F. Rogersinventors
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Abstract
An integrated circuit (“IC”) device capable of programmably performing user selected functions is disclosed. The IC device, in one embodiment, includes multiple input output (“I/O”) blocks, programmable interconnection blocks (“PIBs”), and programmable logic blocks (“PLBs”). While the I/O blocks can be selectively coupled to one of I/O pads, the PIB blocks can be selectively coupled to at least a portion of the I/O blocks. Each of the PLBs, in one aspect, is configured to have at least two programmable look-up tables (“LUTs”). The programmable LUTs are connected in a cascade configuration via a dedicated programmable wire (“DPW”).
Claims20
An integrated circuit (“IC”) device, comprising:
- a programmable logic block (“PLB”) configured to have at least two programmable look-up tables (“LUTs”) and able to perform a logic function programmed by a user, wherein the LUTs are connected in a cascade configuration via a dedicated programmable wire (“DPW”) when the DPW is programmed to a conductive state;
- and
- a first set of programmable interconnection blocks (“PIBs”) coupled to the PLB and configured to selectively route signals from the PLB.
A method of configuring logic blocks in a cascade configuration, comprising:
- identifying total inputs required to performing a selected logic function;
- determining minimal number of look-up tables (“LUTs”) to implement the selected logic function;
- connecting a first end of a first dedicated programmable wire (“DPW”) to an output terminal of a first LUT of the minimal number of LUTs and a second end of the first DPW to a fastest input terminal of a second LUT of the minimal number of LUTs;
- programming the first DPW so that the first end of the first DPW and the second end of the first DPW are electrically conductive;
- and
- receiving input signals carried by a first programmable interconnection array (“PIA”) and forwarding to a plurality of input terminals of the minimal number of LUTs.
An integrated circuit (“IC”) device, comprising:
- a plurality of input output (“I/O”) blocks configured to selectively couple to a plurality of I/O pads;
- a plurality of programmable interconnection blocks (“PIBs”) coupled to the plurality of I/O blocks and able to selectively coupled to at least a portion of the plurality of I/O blocks;
- and
- a plurality of programmable logic blocks (“PLBs”) coupled to the plurality of PIBs, and able to perform selectable logic functions, wherein each of the plurality of PLBs is configured to have at least two programmable look-up tables (“LUTs”), wherein the programmable LUTs are connected in a cascade configuration via a dedicated programmable wire (“DPW”) when the DPW is programmed to a conductive state.
Dependencies are inferred from the claim text.