# US 2013/0278237 A1 · Method and apparatus to control a power factor correction circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0278237 A1 - Document ID: US20130278237A1 - Status: Published application - Kind: A1 - Application number: 13/918,715 - Filed: 2013-06-14 - Published: 2013-10-24 - Earliest claimed: 2008-11-07 - Assignees: Power Integrations, Inc. - Applicants: Power Integrations, Inc. - Inventors: Roland Sylvere Saint-Pierre - Web page: https://patentgrep.com/patent/US20130278237A1 ## CPC - G05F 1/10: Regulating voltage or current (G05F1/02 takes precedence) - H02M 1/4225: {using a non-isolated boost converter} - H02M 1/0022: {the disturbance parameters being input voltage fluctuations} - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract An example on time control circuit for use in a power factor correction (PFC) controller includes an amplifier, an integrator, and a comparator. The amplifier generates an error signal that is representative of a difference between a feedback signal and a reference value. The integrator integrates a current sense signal that is representative of a current through the power switch to generate an integrator output signal. A gain of the integrator is varied in response to a voltage sense signal that is representative of a value of an input voltage of the PFC converter. The comparator generates a switch power off signal to terminate the on time of the power switch in response to comparing the integrator output signal with the error signal. ## Claims ### Claim 1 An on time control circuit for use in a power factor correction (PFC) controller to terminate an on time of a power switch in a PFC converter, the on time control circuit comprising: an amplifier coupled to generate an error signal that is representative of a difference between a feedback signal and a reference value, wherein the feedback signal is representative of an output of the PFC converter; an integrator coupled to integrate a current sense signal that is representative of a current through the power switch to generate an integrator output signal, wherein a gain of the integrator is varied in response to a voltage sense signal that is representative of a value of an input voltage of the PFC converter; and a comparator coupled to the integrator and to the amplifier to generate a switch power off signal to terminate the on time of the power switch in response to comparing the integrator output signal with the error signal. ### Claim 2 (depends on 1) The on time control circuit of claim 1, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is substantially constant independent of the input voltage of the PFC converter. ### Claim 3 (depends on 1) The on time control circuit of claim 1, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is the same for both a first value of the input voltage and a second value of the input voltage. ### Claim 4 (depends on 1) The on time control circuit of claim 1, wherein the comparator generates the switch power off signal to terminate the on time of the power switch when a value of the integrator output signal reaches a value of the error signal. ### Claim 5 (depends on 1) The on time control circuit of claim 1, wherein the integrator comprises: a capacitor coupled to the comparator, wherein a voltage across the capacitor is the integrator output signal; and a current source coupled to charge the capacitor during the on time of the power switch, wherein a value of a current provided by the current source is responsive to both the current sense signal and the voltage sense signal. ### Claim 6 (depends on 5) The on time control circuit of claim 5, wherein the integrator further comprises a transistor coupled to reset the capacitor at the start of each on time of the power switch. ### Claim 7 (depends on 5) The on time control circuit of claim 5, wherein the voltage sense signal is representative of a value of the input voltage of the PFC converter selected from the group consisting of: a peak value of the input voltage, an rms value of the input voltage, and an average value of the input voltage. ### Claim 8 A power factor correction (PFC) controller for use in a PFC converter, the PFC controller comprising: an on time control circuit configured to generate a switch power off signal to terminate an on time of a power switch of the PFC converter, the on time control circuit including: an amplifier coupled to generate an error signal that is representative of a difference between a feedback signal and a reference value, wherein the feedback signal is representative of an output of the PFC converter; an integrator coupled to integrate a current sense signal that is representative of a current through the power switch to generate an integrator output signal, wherein a gain of the integrator is varied in response to a voltage sense signal that is representative of a value of an input voltage of the PFC converter; and a comparator coupled to the integrator and to the amplifier to generate the switch power off signal in response to comparing the integrator output signal with the error signal; and on/off logic coupled to the on time control circuit to generate a switching signal to control switching of the power switch, wherein the on/off logic terminates the on time of the switch in response to the switch power off signal. ### Claim 9 (depends on 8) The PFC controller of claim 8, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is substantially constant independent of the input voltage of the PFC converter. ### Claim 10 (depends on 8) The PFC controller of claim 8, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is the same for both a first value of the input voltage and a second value of the input voltage. ### Claim 11 (depends on 8) The PFC controller of claim 8, wherein the comparator generates the switch power off signal to terminate the on time of the power switch when a value of the integrator output signal reaches a value of the error signal. ### Claim 12 (depends on 8) The PFC controller of claim 8, wherein the integrator comprises: a capacitor coupled to the comparator, wherein a voltage across the capacitor is the integrator output signal; and a current source coupled to charge the capacitor during the on time of the power switch, wherein a value of a current provided by the current source is responsive to both the current sense signal and the voltage sense signal. ### Claim 13 (depends on 12) The PFC controller of claim 12, wherein the integrator further comprises a transistor coupled to reset the capacitor at the start of each on time of the power switch. ### Claim 14 (depends on 8) The PFC controller of claim 8, wherein the voltage sense signal is representative of a value of the input voltage of the PFC converter selected from the group consisting of: a peak value of the input voltage, an rms value of the input voltage, and an average value of the input voltage. ### Claim 15 (depends on 8) The PFC controller of claim 8, wherein the PFC controller and the power switch are included in a single integrated circuit. ### Claim 16 (depends on 8) The PFC controller of claim 8, further comprising an off time control circuit coupled to the on/off logic to generate a power switch on signal to start a next switching cycle period of the power switch. ### Claim 17 A power factor correction (PFC) converter, comprising: an energy transfer element coupled to an input of the PFC converter; a power switch coupled to the energy transfer element; and a PFC controller coupled to the power switch, the PFC controller comprising: an on time control circuit configured to generate a switch power off signal, the on time control circuit including: an amplifier coupled to generate an error signal that is representative of a difference between a feedback signal and a reference value, wherein the feedback signal is representative of an output of the PFC converter; an integrator coupled to integrate a current sense signal that is representative of a current through the power switch to generate an integrator output signal, wherein a gain of the integrator is varied in response to a voltage sense signal that is representative of a value of an input voltage of the PFC converter; and a comparator coupled to the integrator and to the amplifier to generate the switch power off signal in response to comparing the integrator output signal with the error signal; and on/off logic coupled to the on time control circuit to generate a switching signal to control switching of the power switch, wherein the on/off logic terminates the on time of the switch in response to the switch power off signal. ### Claim 18 (depends on 17) The PFC converter of claim 17, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is substantially constant independent of the input voltage of the PFC converter. ### Claim 19 (depends on 17) The PFC converter of claim 17, wherein the gain of the integrator is varied in response to the voltage sense signal such that the error signal is the same for both a first value of the input voltage and a second value of the input voltage. ### Claim 20 (depends on 17) The PFC converter of claim 17, wherein the comparator generates the switch power off signal to terminate the on time of the power switch when a value of the integrator output signal reaches a value of the error signal. ### Claim 21 (depends on 17) The PFC converter of claim 17, wherein the integrator comprises: a capacitor coupled to the comparator, wherein a voltage across the capacitor is the integrator output signal; and a current source coupled to charge the capacitor during the on time of the power switch, wherein a value of a current provided by the current source is responsive to both the current sense signal and the voltage sense signal. ### Claim 22 (depends on 21) The PFC converter of claim 21, wherein the integrator further comprises a transistor coupled to reset the capacitor at the start of each on time of the power switch. ### Claim 23 (depends on 17) The PFC converter of claim 17, wherein the voltage sense signal is representative of a value of the input voltage of the PFC converter selected from the group consisting of: a peak value of the input voltage, an rms value of the input voltage, and an average value of the input voltage. ### Claim 24 (depends on 17) The PFC converter of claim 17, wherein the PFC controller and the power switch are included in a single integrated circuit.