# US 2013/0278199 A1 · Integration of spindle external sense resistor into servo ic with stable resistance control circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0278199 A1 - Document ID: US20130278199A1 - Status: Published application - Kind: A1 - Application number: 13/847,546 - Filed: 2013-03-20 - Published: 2013-10-24 - Earliest claimed: 2012-03-20 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Daijiro Otani; Nakoyuki Tsuruoka; Masaki Yamashita - Web page: https://patentgrep.com/patent/US20130278199A1 ## CPC - H02P 8/14: Arrangements for controlling speed or speed and torque (H02P8/12, H02P8/22 take precedence) - H02P 6/085: {in a bridge configuration} - H02P 6/28: Arrangements for controlling current (H02P6/10 takes precedence) - H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS ## Abstract An apparatus, comprises three driver FETs coupled at their sources; note-driver circuit; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror, and an output of the first transconductance amplifier is an input to the second amplifier. ## Claims ### Claim 1 An apparatus, comprising: three driver FETs coupled at their sources; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror; and an output of the first transconductance amplifier is an input to the second amplifier. ### Claim 2 (depends on 1) The apparatus of claim 1, further comprising wherein the gain of the first transconductance amplifier is changeable. ### Claim 3 (depends on 1) The apparatus of claim 1, further comprising a feedback loop between the sense transistor and a reference resistor coupled to a second input of the second amplifier. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the three driver FETs are driven by a PWM wave shape. ### Claim 5 (depends on 1) The apparatus of claim 1, further comprising a wave shaper coupled to the current mirror. ### Claim 6 (depends on 5) The apparatus of claim 5, further comprising wherein the wave shaper is coupled to an output of a selectable sense resistor. ### Claim 7 (depends on 6) The apparatus of claim 6, further comprising wherein a selectable sense resistor is selectable by at least two bits. ### Claim 8 An apparatus, comprising: a waveshaper that generates a pulse width modulated signal; a programmable gain (Cg), coupled to the waveshaper three driver FETs coupled at their sources that are drive by the pulse width modulated signal; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror, and an output of the first transconductance amplifier is an input to the second amplifier wherein the overall system gain consistent when the gain of the programmable gain (Cg) and a gain of the selectable sense transistor are changed at substantially the same time. ### Claim 9 (depends on 8) An apparatus of claim 8, wherein if the gain of the Cg is changed from x1 to X2, the selectable sense transistor is changed from x2 to x1, wherein the overall system gain is consistent. ### Claim 10 (depends on 8) An apparatus of claim 8, wherein if the gain of the Cg is changed from x2 to x1, the selectable sense transistor is changed from x1 to x2, wherein the overall system gain is consistent. ### Claim 11 (depends on 8) The apparatus of claim 8, wherein without a substantially synchronous change between the selectable sense transistor and the programmable gain, the system loses its stability until the overall gain becomes consistent. ### Claim 12 (depends on 9) The apparatus of claim 9, wherein the instability is correlated to a rotation speed change on the spindle motor until the speed control loop provides the feedback ### Claim 13 (depends on 9) The apparatus of claim 9, wherein the sense transistor is employable as sense resistor. ### Claim 14 An apparatus, comprising: a waveshaper that generates a pulse width modulated signal; a programmable gain (Cg), coupled to the waveshaper three driver FETs coupled at their sources that are drive by the pulse width modulated signal; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror, an output of the first transconductance amplifier is an input to the second amplifier; a feedback loop between the sense transistor and a reference resistor coupled to a second input of the second amplifier; and wherein the overall system gain consistent when the gain of the programmable gain (Cg) and a gain of the selectable sense transistor are changed at substantially the same time. ### Claim 15 (depends on 14) The apparatus of claim 14, wherein the three driver FETs are driven by a PWM wave shape. ### Claim 16 (depends on 14) The apparatus of claim 14, further comprising a wave shaper coupled to the current mirror. ### Claim 17 (depends on 14) The apparatus of claim 14, further wherein the wave shaper is coupled to an output of a selectable sense resistor. ### Claim 18 (depends on 14) The apparatus of claim 14, further comprising wherein a selectable sense resistor is selectable by at least two bits.