Pad structure of a semiconductor device, method of manufacturing the pad structure and semiconductor package including the pad structure
AssigneeSamsung Electronics Co., Ltd.
InventorsNam-Gyu BAEK, Young-Min LEE
Life of this patent
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Abstract
A pad structure usable with a semiconductor device may include an insulating layer pattern structure, a plug, and a pad. The insulating layer pattern structure has a plug hole and at least one via hole. The plug is formed in the plug hole. The pad is formed on the insulating layer pattern structure. The pad is electrically connected with the plug and has a lower surface and an uneven upper surface. The lower surface includes a protruded portion inserted into the via hole. The uneven upper surface includes a recessed portion and an elevated portion- to provide high roughness and firm connection.
Claims20
A pad structure of a semiconductor device, the pad structure comprising:
- an insulating layer pattern structure having a plug hole and at least one via hole;
- a plug formed in the plug hole;
- and
- a pad formed on the insulating layer pattern structure and electrically connected to the plug, the pad having a protruded portion that is formed at a lower surface of the pad to fill up the via hole, and a recessed portion and an elevated portion that are formed at an upper surface of the pad, the recessed portion and the elevated portion having an arrangement corresponding to that of the protruded portion.
A method of manufacturing a pad structure of a semiconductor device, the method comprising:
- pattering an insulating layer to form an insulating layer pattern structure having a plug hole and at least one via hole;
- forming a plug in the plug hole;
- and
- forming a pad on the insulating layer pattern structure and in the via hole to electrically connect the plug with the pad, the pad having a recessed portion and an elevated portion that are formed at an upper surface of the pad, the recessed portion and the elevated portion having an arrangement corresponding to that of the protruded portion.
A semiconductor package comprising:
- a package substrate;
- a semiconductor chip arranged on an upper surface of the package substrate, the semiconductor chip including an insulating layer pattern structure having a plug hole and at least one via hole, a plug formed in the plug hole, and a pad formed on the insulating layer pattern structure and electrically connected to the plug, the pad having a protruded portion that is formed at a lower surface of the pad to fill up the via hole, and a recessed portion and an elevated portion that are formed at an upper surface of the pad, the recessed portion and the elevated portion having an arrangement corresponding to that of the protruded portion;
- and
- a conductive connecting member to electrically connect the pad of the semiconductor chip with the package substrate.
A pad structure usable with a semiconductor device, comprising:
- a first insulation layer pattern;
- a second insulating layer pattern formed on the first insulation layer pattern and having a plug hole and at least one via hole;
- a plug formed in the plug hole;
- a pad disposed on the second insulating layer pattern and electrically connected to the plug, and having a main portion, a protruding portion formed on a first side of the main portion and disposed in the at least one via hole, and an uneven surface portion formed on a second side of the main portion such that a first tie is formed between the via hole of the first insulating layer pattern and the protruding portion of the pad, and a second tie is formed between the uneven surface portion of the pad and an external conductive structure.
Dependencies are inferred from the claim text.