Through silcon via with reduced shunt capacitance
AssigneeFairchild Semiconductor Corporation
InventorsJanusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Abstract
This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can include a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon.
Claims10
A via layer for a MEMS device, the via layer comprising;
- a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including a dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon.
A sensor comprising:
- a cap layer;
- a device layer, coupled to the cap layer, including a proof mass;
- and
- a via layer coupled to the device layer, wherein the device layer includes:
- a silicon substrate having a pair of trenches separated in a horizontal direction by a portion of the silicon substrate,
- wherein each trench of the pair of trenches includes first and second vertical layers including a dielectric separated by a third vertical layer including polysilicon.
Dependencies are inferred from the claim text.