Semiconductor Fin Structures and Methods for Forming the Same

A device comprising:

• a semiconductor substrate;
• a plurality of Shallow Trench Isolation (STI) regions in the semiconductor substrate;
• a plurality of semiconductor fins parallel to each other and in the semiconductor substrate;
• a plurality of fin extensions underlying and aligned to the plurality of semiconductor fins, wherein the plurality of STI regions is disposed between the plurality of fin extensions;
• an edge STI region on a side of the plurality of fin extensions, wherein the edge STI region comprises a first bottom surface substantially level with bottom surfaces of the plurality of STI regions, and a second bottom surface higher than the first bottom surface;
• and
• a fin extension residue having a bottom substantially level with bottoms of the plurality of fin extensions, wherein the fin extension residue extends into the edge STI region, and wherein a top surface of the fin extension residue is in contact with the second bottom surface of the edge STI region.

A method comprising:

• forming a patterned mask comprising a plurality of strips;
• etching a semiconductor substrate underlying the patterned mask to form a first and a second plurality of semiconductor fins, wherein the patterned mask is used as an etching mask;
• etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins, wherein a recess is formed in the semiconductor substrate by the step of etching the second plurality of semiconductor fins;
• and
• filling the recess with a dielectric material to form an isolation region, wherein the first plurality of semiconductor fins is over a top surface of the isolation region.