Methods for Forming Through Vias
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu, Hao-Yi Tsai, Mirng-Ji Lii, Da-Yuan Shih
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu, Hao-Yi Tsai, Mirng-Ji Lii, Da-Yuan Shih
Estimating the term…
Methods for forming through vias in an integrated circuit package are disclosed. A substrate having a first surface is covered with an encapsulation layer of uncured material; the method includes inserting an upper mold tool having a first plurality of pillars into the encapsulation layer to imprint through vias extending to the first surface of the substrate; curing the encapsulation layer and the through vias; removing the upper mold tool from the encapsulation layer; and disposing conductor material within the through vias to make electrical connectors within the through vias. In additional methods, a method for forming an encapsulation layer using an upper and lower mold tool to form through vias and a mold cavity is disclosed.
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