Data transmission apparatus, data reception apparatus, and data transmission method
AssigneeElectronics and Telecommunications Research Institute
InventorsMyeong-Hoon Oh, Chi-Hoon Shin, Sung-Han Kim, Seong-Woon Kim
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Abstract
Disclosed herein are a data transmission apparatus, a data reception apparatus, and a data transmission method. The data transmission apparatus, the data reception apparatus, and the data transmission method are capable of simplifying the circuit structure of a decoder because an assumption of the time related to a request signal and a data signal is not necessary and an additional logic for generating a clock signal for the decoder is not necessary by using a Finite State Machine (FSM) logic without storing a state via a delay device.
Claims18
A data transmission apparatus, comprising:
- a data transmitter for generating a request signal and a data signal having a Non-Return-to-Zero (NRZ) format that is divided into a binary value “0” and a binary value “1” on a basis of a transition point of the request signal;
- and
- an encoder for receiving the request signal and the data signal and converting the binary value “0,” the binary value “1” and a current binary value identical to a previous binary value into respectively different current levels, by performing an operation on the request signal and the data signal using a Finite State Machine (FSM) which is generated by allocating a LOW state indicative of the binary value “0,” a HIGH state indicative of the binary value “1” and a MIDDLE state indicative of the current binary value identical to the previous binary value to specific state signals.
A data reception apparatus, comprising:
- a decoder for receiving an input current signal encoded using an FSM generated by allocating a LOW state indicative of the binary value “0,” a HIGH state indicative of the binary value “1,” and a MIDDLE state indicative of a current binary value identical to a previous binary value to specific state signals, generating voltage values corresponding to the three types of logic states using internally generated reference current, and restoring a request signal and a data signal based on the generated voltage values;
- and
- a data receiver for sending a response signal to a receiving side in response to the restored request signal and the restored data signal.
A data transmission method, comprising:
- receiving a request signal and a data signal having an NRZ format that is divided into a binary value “0” and a binary value “1” on a basis of a transition point of the request signal;
- performing an operation on the request signal and the data signal using an FSM generated by allocating a LOW state indicative of the binary value “0,” a HIGH state indicative of the binary value “1,” and a MIDDLE state indicative of a current binary value identical to a previous binary value to specific state signals, and coding the binary value “1” into a first current level, coding the binary value “0” into a second current level lower than the first current level, and coding the current binary value identical to the previous binary value into a third current level lower than the first current level but higher than the second current level based on results of the operation;
- receiving any one current level of the first to third current levels;
- detecting the any one current level and generating first and second logic voltages based on the detected current level;
- and
- restoring the data signal and the request signal by performing an operation on the first and second logic voltages.
Dependencies are inferred from the claim text.