High capaciy low cost multi-state magnetic memory

A multi-state current-switching magnetic memory element configured to store a state by current flowing therethrough to switch the state comprising:

• a first magnetic tunneling junction (MTJ) formed on top of a bottom electrode;
• a second MTJ, formed on top of the first MTJ, and the second MTJ separated from the first MTJ by and an amorphous isolation layer;
• and
• a top electrode formed on top of the second MTJ, each of the first and second MTJ having a free layer with a switchable magnetic orientation, a barrier layer and a fixed layer, the first and second MTJs collectively operable to store more than one bit of information with each of the first and second MTJs storing one bit of information, each of the free layers of the first and second MTJs having a different composition based on the amount of oxide therein, and each of the free layers of the first and second MTJs being responsive to a unique switching current based on the composition of the free layer,
• wherein the free layer switches its magnetic orientation based upon the level of the switching current applied thereto, wherein different levels of current applied to the memory element causes switching to different states.

A program/erase circuit comprising:

• a first current source;
• a second current mirror circuit coupled to the current source;
• a first switch;
• a second switch coupled to the first switch;
• a multi-state current-switching magnetic memory cell coupled to the second switch, the multi-state current-switching magnetic memory cell including a plurality of magnetic tunnel junction (MTJs), the MTJs being separated from each other by at least one amorphous isolation layer, at least two of the MJTs having free layers with different compositions based on the amount of oxide therein, and each of the free layers of the at least two MTJs being responsive to a unique switching current based on the composition of the free layer,
• wherein the free layer switches its magnetic orientation based upon the level of the switching current applied thereto, wherein different levels of switching current applied to the memory element causes the at least two MTJs to switch to different states;
• a third switch coupled to the multi-state current-switching magnetic memory cell;
• a second current source;
• and
• a second current mirror circuit coupled to the second current source and to the first switch,
• wherein the MTJs are programmed by applying a first current level to the first current source and a second current level to the second current source to cause varying current levels through the MTJs, the first and second current levels being different from one another and wherein switching the first, second, and third switches causes selectively to program or erase the MTJs of the multi-state current-switching magnetic memory cell.

A read circuit comprising:

• a memory cell including a first and a second magnetic tunnel junction (MTJ), each of the first and second MTJs having a resistance associated therewith, the first and second MTJs being separated from each other by at least one amorphous isolation layer, the first and second MTJ each having a free layer and the free layers of the first and second MTJs having different compositions based on the amount of oxide therein, and each of the free layers of the first and second MTJs being responsive to a unique switching current based on the composition of the free layer;
• a sense amplifier coupled to the memory cell;
• a reference circuit coupled to the sense amplifier, the reference circuit including a plurality of state reference circuits, each of the plurality of state reference circuits having a resistance associated therewith,
• wherein the first and second MTJs are read using the sense amplifier by comparing the resistances of the first and second MTJs to the resistances of the plurality of state reference circuits.