Single Cycle Data Copy for Two-Port SRAM

A static random access memory (SRAM) with an internal copy function, comprising:

• a precharge device to place a global bit line in a precharge state during a cycle of the SRAM;
• a read bit line circuit to drive a value stored in a first memory cell onto the global bit line during the cycle of the SRAM;
• and
• a copy bit line circuit to drive the value on the global bit line into a second memory cell during the cycle of the SRAM.

A method for copying a value from any static random access memory (SRAM) cell in a column of SRAM cells to any SRAM cell, comprising:

• selecting a first SRAM memory cell in the column of SRAM memory cells;
• selecting a second SRAM memory cell in the column of SRAM memory cells;
• and
• copying a value stored in the first SRAM memory cell to the second SRAM memory cell in a single cycle of the SRAM.

A design structure tangibly embodied in a machine readable storage medium used in a design process, the design structure comprising:

• a static random access memory (SRAM) including a column of SRAM cells;
• and
• a circuit to copy a value stored in any SRAM cell in the column of SRAM cells to any SRAM cell in the column of SRAM cells in a single cycle of the SRAM,
• wherein the design structure, when read and used in the manufacture of a semiconductor chip produces a chip comprising the SRAM.