Back to results
US 2013/0257539 A1Published application
Compound semiconductor device and method for manufacturing the same
AssigneeFujitsu Limited
InventorJunji KOTANI
Life of this patent
Estimating the term…
Abstract
A compound semiconductor device includes a substrate; a buffer layer formed on the substrate; an electron transit layer and an electron donating layer formed on the buffer layer; a gate electrode, a source electrode, and a drain electrode formed on the electron donating layer; and an embedded electrode to which a potential independent of the gate electrode, the source electrode, and the drain electrode is supplied to control a potential of the buffer layer.
Claims18
A compound semiconductor device comprising:
- a substrate;
- a buffer layer formed on the substrate;
- an electron transit layer and an electron donating layer formed on the buffer layer;
- a gate electrode, a source electrode, and a drain electrode formed on the electron donating layer;
- and
- an embedded electrode to which a potential independent of the gate electrode, the source electrode, and the drain electrode is supplied to control a potential of the buffer layer.
3 more elements
A high-output amplifier comprising:
- a compound semiconductor device that includes
- a substrate;
- a buffer layer formed on the substrate;
- an electron transit layer and an electron donating layer formed on the buffer layer;
- a gate electrode, a source electrode, and a drain electrode formed on the electron donating layer;
- and
- an embedded electrode to which a potential independent of the gate electrode, the source electrode, and the drain electrode is supplied to control a potential of the buffer layer.
4 more elements
A method for manufacturing a compound semiconductor device, the method comprising:
- forming a buffer layer on a substrate;
- forming an electron transit layer and an electron donating layer on the buffer layer;
- forming a gate electrode, a source electrode, and a drain electrode on the electron donating layer;
- and
- forming an embedded electrode to which a potential independent of the gate electrode, the source electrode, and the drain electrode is supplied to control a potential of the buffer layer.
2 more elements
Dependencies are inferred from the claim text.