Offset reduction for analog front-ends
AssigneeTexas Instruments Incorporated
InventorsAJIT SHARMA, Kemal S. DEMIRCI
Life of this patent
Estimating the term…
Abstract
A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise.
Claims20
A circuit comprising:
- a first amplifier configured to amplify an input signal to generate an output signal;
- an offset sensor configured to sense DC offset based on the output signal, the offset sensor comprising a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset;
- and
- a T-network that includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier.
A method comprising:
- adjusting a T-network feedback loop to set a signal gain of a first amplifier;
- sensing a DC offset from an output of the first amplifier via a second amplifier;
- adjusting a gain of the second amplifier in relation to the DC offset sensed from the output of the first amplifier;
- and
- applying an output from the second amplifier to the T-network feedback loop to mitigate the DC offset in the first amplifier.
An integrated circuit comprising:
- a differential amplifier configured to amplify a first input signal and a second input signal to generate a first output signal and a second output signal;
- a first offset sensor configured to sense DC offset based on the first output signal, the first offset sensor comprising a first auxiliary amplifier configured to generate a first offset reduction signal for the differential amplifier based on the sensed DC offset of the first output signal;
- a second offset sensor configured to sense DC offset based on the second output signal, the second offset sensor comprising a second auxiliary amplifier configured to generate a second offset reduction signal for the differential amplifier based on the sensed DC offset of the second output signal;
- a first T-network that includes at least three resistors coupled to provide a feedback connection between the first input signal and the first output signal for the differential amplifier and to receive the first offset reduction signal to mitigate DC offset in first output signal of the differential amplifier;
- and
- a second T-network that includes at least three resistors coupled to provide a feedback connection between the second input signal and the second output signal for the differential amplifier and to receive the second offset reduction signal to mitigate DC offset in the second output signal of the differential amplifier.
Dependencies are inferred from the claim text.