High input voltage charge pump
OwnerTyler Daigle, Julie Lynn Stultzinventors
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Abstract
This document discusses, among other things, a charge pump circuit that includes an input, an output, a plurality of field effect transistors (FETs), each of the plurality FETs having a respective gate terminal, and at least two flying capacitors in electrical communication with at least one of the plurality of FETs. Each of the respective gate terminals is configured to receive a respective logic level shifted clock signal voltage. The at least two flying capacitors are configured to alternatingly charge and discharge in response to the logic level shifted clock signal voltages, and the at least two flying capacitors are configured to supply a voltage at the output that is different from a voltage at the input.
Claims16
A charge pump circuit comprising:
- an input;
- an output;
- a plurality of field effect transistors (FETs), each of the plurality FETs having a respective gate terminal;
- and
- at least two flying capacitors in electrical communication with at least one of the plurality of FETs,
- wherein each of the respective gate terminals is configured to receive a respective logic level shifted clock signal voltage,
- wherein the at least two flying capacitors are configured to alternatingly charge and discharge in response to the logic level shifted clock signal voltages, and
- wherein the at least two flying capacitors are configured to supply a voltage at the output that is different from a voltage at the input.
An integrated circuit consisting of:
- a charge pump circuit comprising:
- an input;
- an output;
- a plurality of field effect transistors (FETs), each of the plurality FETs having a respective gate terminal,
- wherein each of the respective gate terminals is configured to receive a respective logic level shifted clock signal voltage,
- wherein at least two flying capacitors in electrical communication with at least one of the plurality of FETs are configured to alternatingly charge and discharge in response to the logic level shifted clock signal voltages, and
- wherein the at least two flying capacitors are configured to supply a voltage at the output that is different from a voltage at the input.
A method for generating a boosted voltage at a charge pump circuit output, the method comprising:
- generating a plurality of logic level shifted clock signal voltages;
- applying the plurality of logic level shifted clock signal voltages, respectively, to a plurality of gate terminals of a plurality of field effect transistors (FETs);
- and
- alternatingly charging and discharging at least two flying capacitors in electrical communication with the plurality of FETs in response to the different clock signal voltages,
- wherein the at least two flying capacitors are configured to supply a boosted voltage at the output of the charge pump circuit.
Dependencies are inferred from the claim text.