Method and system for iteratively testing and repairing an array of memory cells

A method comprising:

• iteratively testing an array of memory cells, wherein a plurality of memory cells in the array of memory cells are redundant to other memory cells in the array of memory cells, and wherein iteratively testing the array of memory cells includes, during each test of the array of memory cells,
• (i) identifying one or more defective memory cells in the array of memory cells, if any, and
• (ii) in response to one or more defective memory cells being identified during the test, respectively replacing the one or more defective memory cells with one or more of the plurality of memory cells that are redundant to other memory cells in the array of memory cells,
• wherein the iterative testing of the array of memory cells is performed until (i) a defective memory cell is no longer detected or (ii) no memory cells of the plurality of memory cells that are redundant to other memory cells in the array of memory cells remain available for replacement of a defective memory cell.

A non-transitory computer readable medium configured to store a computer program, the computer program comprising instructions to cause a programmable processor to:

• iteratively testing an array of memory cells, wherein a plurality of memory cells in the array of memory cells are redundant to other memory cells in the array of memory cells, and wherein the instructions to cause the programmable processor to iteratively test the array of memory cells includes instructions to cause the programmable processor to, during each test of the array of memory cells,
• (i) identify one or more defective memory cells in the array of memory cells, if any, and
• (ii) in response to one or more defective memory cells being identified during the test, respectively replace the one or more defective memory cells with one or more of the plurality of memory cells that are redundant to other memory cells in the array of memory cells,
• wherein the instructions to cause the programmable processor to iteratively test the array of memory cells includes instructions to cause the programmable processor to perform the iterative testing of the array of memory cells until (i) a defective memory cell is no longer detected or (ii) no memory cells of the plurality of memory cells that are redundant to other memory cells in the array of memory cells remain available for replacement of a defective memory cell.