Method of manufacturing a laminate circuit board with a multilayer circuit structure

A method of manufacturing a laminate circuit board with a multilayer circuit structure, comprising steps of:

• forming a metal layer on at least one surface of a substrate, said at least one surface of the substrate being a smooth surface;
• patterning the metal layer to form a circuit metal layer through an image transfer process;
• forming a nanometer plating layer with a thickness of 5˜40 nm on the circuit metal layer;
• forming a cover layer made of a binder or a solder resist on the substrate for covering the circuit metal layer and the nanometer plating layer;
• forming at least one through hole on the cover layer with respect to the circuit metal layer to generate at least one opening exposing part of the nanometer plating layer;
• forming a next metal layer on the cover layer to at least fill up said at least one opening;
• and
• repeating part of above steps by patterning said next metal layer, forming a next nanometer plating layer, and forming a next cover layer to generate the multilayer circuit structure in the laminate circuit board,
• wherein an outer surface of the circuit metal layer, the smooth surface of the substrate and an outer surface of the nanometer plating layer have a roughness which is defined by Ra<0.3 μm and Rz<3 μm and not recognizable by cross-sectional examination through an optical microscope of 1,000 magnifications.

A method of manufacturing a laminate circuit board with a multilayer circuit structure, comprising:

• forming a metal layer on a performing substrate;
• patterning the metal layer to form a circuit metal layer through an image transfer process;
• forming a nanometer plating layer with a thickness of 5˜40 nm on the circuit metal layer;
• pressing the performing substrate against a substrate to push the circuit metal layer and the nanometer plating layer into the substrate;
• removing said performing substrate away from the substrate to expose the circuit metal layer;
• forming at least one through hole on the substrate with respect to the circuit metal layer to generate at least one opening exposing part of the nanometer plating layer;
• forming a second metal layer on the substrate to at least fill up said at least one opening;
• pattering the second metal layer to form a second circuit metal layer;
• forming a second nanometer plating layer on the circuit metal layer, and forming a third nanometer plating layer on the second circuit metal layer;
• and
• forming a cover layer made of a binder or a solder resist on the substrate for covering a surface of the substrate, the second circuit metal layer and the second nanometer plating layer to generate the multilayer circuit structure in the laminate circuit board,
• wherein a surface of the performing substrate, and outer surfaces of the circuit metal layer, the nanometer plating layer, the second circuit metal layer and the second nanometer plating layer have a roughness which is defined by Ra (Arithmetical mean roughness)<0.35 μm and Rz (Ten-point mean roughness)<3 μm and not recognizable by cross-sectional examination through an optical microscope of 1,000 magnifications.