System and method of electromigration mitigation in stacked ic designs
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChi-Yeh YU, Chung-Min FU, Ping-Heng YEH
Life of this patent
Estimating the term…
Abstract
A computer implemented method comprises accessing a 3D-IC model stored in a tangible, non-transitory machine readable medium, processing the model in a computer processor to generate a temperature map containing temperatures at a plurality of points of the 3D-IC under the operating condition; identifying an electromigration (EM) rating factor, and calculating and outputting from the processor data representing a temperature-dependent EM current constraint at each point.
Claims19
A computer implemented method comprising:
- accessing a three-dimensional integrated circuit (3D-IC) model stored in a tangible, non-transitory machine readable medium, the model comprising a plurality of elements representing a 3D-IC design to be fabricated and to be operated under a condition;
- generating a temperature map in a computer processor based on the 3D-IC model, the temperature map including temperatures at a plurality of points of the 3D-IC based on the 3D-IC operating under the condition;
- identifying an electromigration rating factor at each of the plurality of points based on the 3D-IC;
- and
- outputting data representing a temperature-dependent electromigration current constraint at each of the plurality of points of the 3D-IC based on the electromigration rating factors.
A computer implemented method comprising:
- accessing a three-dimensional integrated circuit (3D-IC) model stored in a tangible, non-transitory machine readable medium, the model comprising a plurality of elements representing a 3D-IC design to be fabricated and to operate under a condition;
- processing the 3D-IC model in a computer processor, wherein the processor is programmed to analyze the 3D-IC to calculate a temperature at each of a plurality of points of the 3D-IC operating under the condition;
- identifying a respective electrical resistance at each of the plurality of points based on the calculated temperatures;
- and
- calculating and outputting from the processor data representing a voltage drop at each point of the plurality of points based on the electrical resistance.
A computer implemented system comprising:
- one or more processors;
- and
- at least one tangible, non-transitory machine readable medium encoded with one or more programs, to be executed by the one or more processors, to perform steps of:
- accessing a three-dimensional integrated circuit (3D-IC) model stored in the tangible, non-transitory machine readable medium, the model comprising a plurality of elements representing an 3D-IC design to be fabricated and to operate under a condition;
- processing the 3D-IC model in the processor, wherein the processor is programmed to analyze the 3D-IC design to calculate a temperature at each of a plurality of points in the 3D-IC based on an input of the 3D-IC under the condition;
- identifying an electromigration rating factor at each of the plurality of points of the 3D-IC based on the temperature of each point;
- and
- calculating and outputting from the processor data representing a temperature-dependent electromigration current constraint at each point of the 3D-IC based on the electromigration rating factors.
Dependencies are inferred from the claim text.