High Throughput Interleaver/De-Interleaver
AssigneeBroadLogic Network Technologies, Inc.
InventorsBinfan Liu, Junyi Xu
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AssigneeBroadLogic Network Technologies, Inc.
InventorsBinfan Liu, Junyi Xu
Estimating the term…
Systems and methods for performing high-speed multi-channel forward error correction using external DDR SDRAM is provided. According to one exemplary aspect, an interleaver/deinterleaver performs both read and write accesses to the DDR SDRAM that are burst-oriented by hiding active and precharge cycles in order to achieve high data rate operations. The interleaver/deinterleaver accesses data in the DDR SDRAM as read blocks and write blocks. Each block includes two data sequences. Each data sequence further includes a predetermined number of data words to be interleaved/deinterleaved. The PRECHARGE and ACTIVE command for one data sequence is issued when a preceding data sequence is being processed. Data in one read/write data sequence has the same row address within the same bank of the DDR SDRAM.
A computer-implemented method for outputting interleaved data stored in a device having a double data rate random access memory, the method comprising, by an interleaver/deinterleaver:
A computer-implemented method for reading interleaved data from a double data rate random access memory (DDR RAM) included in a device wherein the double data rate random access memory includes a first bank and a second bank, the method comprising, by an interleaver/deinterleaver device:
A method for managing interleaved data in a DDR memory having a first bank and a second bank, wherein the interleaved data is divided into a first data block and a second data block, the method comprising:
A method for managing interleaved data in an output buffer having a plurality of rows and columns, the output buffer being part of a device having a DDR memory, the method comprising, by the device:
Dependencies are inferred from the claim text.