Memory system and method of controlling memory system
AssigneeKabushiki Kaisha Toshiba
InventorsToshikatsu Hida, Norikazu Yoshida, Eiji Yoshihashi, Hirokuni Yano
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a controller reads out the non-volatile address management information required to execute one of the read commands into an address information cache and retrieves data from the nonvolatile memory according to the volatile address management information stored in the address information cache. In addition, the controller among the read commands stored in the command queue, preferentially executes the read command whose logical addresses are all found in the volatile address management information.
Claims20
A memory system comprising:
- a nonvolatile memory configured to store data supplied from a host apparatus and to store nonvolatile address management information in which a physical address of the nonvolatile memory and a logical address designated by the host apparatus are associated with each other;
- a command queue configured to store a plurality of read and write commands issued by the host apparatus;
- an address information cache configured to store volatile address management information which is a portion of the nonvolatile address management information;
- and
- a controller configured to:
- read out the nonvolatile address management information required to execute one of the read commands into the address information cache;
- retrieve data from the nonvolatile memory according to the volatile address management information stored in the address information cache;
- and
- among the read commands stored in the command queue, preferentially execute the read command whose logical addresses are all found in the volatile address management information.
A method of controlling a memory system including a nonvolatile memory, comprising:
- storing data supplied from a host apparatus and nonvolatile address management information in which a physical address of the nonvolatile memory and a logical address designated by the host apparatus are associated with each other in the nonvolatile memory;
- storing a plurality of read and write commands issued by the host apparatus in a command queue;
- storing volatile address management information which is a portion of the nonvolatile address management information in an address information cache;
- reading out the nonvolatile address management information required to execute one of the read commands into the address information cache;
- retrieving data from the nonvolatile memory according to the volatile address management information stored in the address information cache;
- and
- among the read commands stored in the command queue, preferentially executing the read command whose logical addresses are all found in the volatile address management information.
Dependencies are inferred from the claim text.