Field effect transistor current mode logic with changeable bulk configuration of load transistors
AssigneeAalto University Foundation
InventorsMatthew Turnquist, Lauri Koskinen, Jani Mäkipää, Erkka Laulainen
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Abstract
A field effect transistor current mode differential logic circuit comprising load transistors for converting the current output of each differential leg current to voltage output, and means for configuring the bulk of each differential leg's load transistor to be connected to the drain of the load transistor for use the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg load transistor to be connected to a voltage or to source of the same transistor for use in MOS current more logic (MCML) operation.
Claims6
A field effect transistor current mode differential logic circuit comprising load transistors (M5, M6) for converting the current output of each differential leg current to voltage output, characterized logic circuit comprising means for configuring the bulk of each differential current output leg's load transistor (M5, M6) to be connected to the drain of the same load transistor for using the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg's load transistor to be connected to the source of the same transistor or to a voltage source (Vdd) for use in MOS current mode logic (MCML) operation.
A field effect transistor current mode differential logic circuit, wherein the means for configuring (102, 103) the bulk connection or load transistors include switch members (S1) to connect the bulk of load transistors to source and switch members (S2) to connect the bulk of load transistors to the drain of the load transistor.
A field effect transistor current mode differential logic circuit, wherein the means for configuring the bulk connection includes at least two load transistors for each differential leg, one for use in Subthreshold Source Coupled Logic (STSCL) mode bulk connected to drain and another load transistor for MOS current mode logic (MCML) operation having the bulk connected to its source or to a voltage, that allows MCML operation.
A method for changing the operation of a logic circuit between a high frequency mode operation and a low power and low voltage operation mode, comprising arranging a insulated gate current mode logic circuit with voltage swing control and load transistors for converting the current mode output to voltage output, characterized by switching during low power use in Subthreshold Source Coupled Logic (STSCL) mode the load transistors to be used their bulk connected to drain, and switching for high frequency use in MOS current mode logic (MCML) operation mode the load transistors to work their bulk connected to source or to other voltage level (Vdd) that prevents the source-bulk diode turn on during the operation.
Dependencies are inferred from the claim text.