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US 2013/0200484 A1Published application
Process for manufacturing a wafer by annealing of buried channels
AssigneeSTMicroelectronics S.r.l.
InventorsFlavio VILLA, Gabriele BARLOCCHI, Pietro CORONA
Life of this patent
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Abstract
A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
Claims11
-32. (canceled)
A semiconductor structure, comprising:
- a closed cavity;
- and
- an epitaxial layer disposed over the cavity.
A semiconductor structure, comprising:
- a region;
- a cavity disposed in the region and formed by
- forming an opening in the region, and
- annealing the region;
- and
- an epitaxial layer disposed over the cavity.
3 more elements
A system, comprising:
- a first integrated circuit, comprising
- a semiconductor structure, comprising:
- a closed cavity;
- and
- an epitaxial layer disposed over the cavity;
- a second integrated circuit coupled to the first integrated circuit.
3 more elements
Dependencies are inferred from the claim text.