US 2013/0200331 A1 · SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME

Abstract

In a semiconductor storage device where a plurality of memory cells obtained by connecting a vertical transistor and a phase-change element in parallel is formed along a direction perpendicular to a main face of a semiconductor substrate, highly-reliable selection operation is made possible with a further low voltage. A plurality of through-holes extending through insulating films and polysilicon layers is formed in regions at which word lines and bit lines intersect with each other. A plurality of vertical chain memories composed of a gate insulating film 111, a channel film, a reaction-preventing film, a metal silicide film having a resistance lower than that of the reaction-preventing film, a phase-change film, and an embedding insulating film is formed inside each through-hole. The channel film and the reaction-preventing film are separated into respective pieces at regions among a plurality of memory cells arranged along a direction perpendicular to a main face of a semiconductor substrate. Further, the channel films of respective memory cells are connected to one another through the metal silicide films provided in regions among the plurality of memory cells.

Claims10

Dependent claims

A semiconductor storage device where a plurality of memory cells obtained by connecting a vertical transistor and a phase-change element whose resistant value is changed by current in parallel is formed along a first direction perpendicular to a main face of a semiconductor substrate, wherein

a stacked body obtained by stacking (N+1) insulating layers and N gate semiconductor layers alternately and a plurality of through-holes extending through the stacked body in the first direction are formed on the main face of the semiconductor substrate, where N is a natural number,
a gate insulating film of the vertical transistor, a channel film of the vertical transistor, a reaction-preventing film, and a phase-change film constituting the phase-change element are formed inside each of the plurality of through-holes, and
the reaction-preventing film is separated into respective pieces at regions among the plurality of memory cells formed along the first direction.

A manufacturing method of a semiconductor storage device where a plurality of memory cells obtained by connecting a vertical transistor and a phase-change element whose resistant value is changed by current in parallel is formed along a first direction perpendicular to a main face of a semiconductor substrate, comprising:

(a) a step of forming a stacked body obtained by stacking (N+1) insulating layers and N gate semiconductor layers alternately on the main face of the semiconductor substrate, where N is a natural number;
(b) a step of forming a plurality of through-holes extending through the stacked body along the first direction;
(c) a step of isotropically-etching the N gate semiconductor layers exposed to side walls of insides of the plurality of through-holes to perform setting-back laterally;
(d) a step of embedding a gate insulating film of the vertical transistor, a channel film of the vertical transistor, and a reaction-preventing film into the plurality of through-holes in this order after the step (c);
(e) a step of anisotropically-etching the reaction-preventing film to separate the reaction-preventing film into respective pieces at regions among the plurality of memory cells formed in the first direction;
and
(f) a step of embedding a phase-change film constituting the phase-change element into the plurality of through-holes after the step (e).

4 more elements

Dependencies are inferred from the claim text.

Semiconductor storage device and method of manufacturing the same

Life of this patent

Semiconductor storage device and method of manufacturing the same

Life of this patent

Abstract

Claims10