Power semiconductor module and method of manufacturing the same
AssigneeMitsubishi Electric Corporation
InventorsOsamu USUI, Naoki YOSHIMATSU, Masao KIKUCHI
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Abstract
First chip main surfaces of first semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the first semiconductor chips are bonded to a first electrode. First chip main surfaces of second semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the second semiconductor chips are bonded to a first electrode. A plurality of electrodes are provided by a lead frame. An insulating member is provided on a side opposite to the chips when viewed from the heat spreader. An insulating substrate is provided on a side opposite to the chips when viewed from the first electrodes.
Claims11
A power semiconductor module of resin-sealed type, comprising:
- at least one unit structure including a plurality of semiconductor chips each having a first chip main surface and a second chip main surface, and a heat spreader having conductivity, to which said first chip main surfaces of said plurality of semiconductor chips are bonded with a first bonding member;
- an insulating member located on a side opposite to said plurality of semiconductor chips when viewed from said heat spreader;
- a plurality of electrodes including at least one first electrode bonded to said second chip main surfaces of predetermined chips among said plurality of semiconductor chips with a second bonding member, said plurality of electrodes being provided by a lead frame in which said plurality of electrodes are formed in advance;
- an insulating substrate including an insulating layer located on a side opposite to said plurality of semiconductor chips when viewed from said at least one first electrode, and a first conductive layer located between said insulating layer and said at least one first electrode and bonded to said at least one first electrode with a third bonding member;
- and
- a molding resin sealing said at least one unit structure and said plurality of electrodes in a state in which a surface of said insulating member on a side far from said plurality of semiconductor chips, a surface of said insulating substrate on the side far from said plurality of semiconductor chips, and external terminal portions of said plurality of electrodes are exposed.
Dependencies are inferred from the claim text.